1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22/*
23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27/*
28 * #pragma ident "@(#)fasttrap_isa.c 1.27 08/04/09 SMI"
29 */
30
31#ifdef KERNEL
32#ifndef _KERNEL
33#define _KERNEL /* Solaris vs. Darwin */
34#endif
35#endif
36
37#include <sys/fasttrap_isa.h>
38#include <sys/fasttrap_impl.h>
39#include <sys/dtrace.h>
40#include <sys/dtrace_impl.h>
41extern dtrace_id_t dtrace_probeid_error;
42
43#include "fasttrap_regset.h"
44
45#include <sys/dtrace_ptss.h>
46#include <kern/debug.h>
47
48#include <machine/pal_routines.h>
49
50/* Solaris proc_t is the struct. Darwin's proc_t is a pointer to it. */
51#define proc_t struct proc /* Steer clear of the Darwin typedef for proc_t */
52
53/*
54 * Lossless User-Land Tracing on x86
55 * ---------------------------------
56 *
57 * The execution of most instructions is not dependent on the address; for
58 * these instructions it is sufficient to copy them into the user process's
59 * address space and execute them. To effectively single-step an instruction
60 * in user-land, we copy out the following sequence of instructions to scratch
61 * space in the user thread's ulwp_t structure.
62 *
63 * We then set the program counter (%eip or %rip) to point to this scratch
64 * space. Once execution resumes, the original instruction is executed and
65 * then control flow is redirected to what was originally the subsequent
66 * instruction. If the kernel attemps to deliver a signal while single-
67 * stepping, the signal is deferred and the program counter is moved into the
68 * second sequence of instructions. The second sequence ends in a trap into
69 * the kernel where the deferred signal is then properly handled and delivered.
70 *
71 * For instructions whose execute is position dependent, we perform simple
72 * emulation. These instructions are limited to control transfer
73 * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle
74 * of %rip-relative addressing that means that almost any instruction can be
75 * position dependent. For all the details on how we emulate generic
76 * instructions included %rip-relative instructions, see the code in
77 * fasttrap_pid_probe() below where we handle instructions of type
78 * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing).
79 */
80
81#define FASTTRAP_MODRM_MOD(modrm) (((modrm) >> 6) & 0x3)
82#define FASTTRAP_MODRM_REG(modrm) (((modrm) >> 3) & 0x7)
83#define FASTTRAP_MODRM_RM(modrm) ((modrm) & 0x7)
84#define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm))
85
86#define FASTTRAP_SIB_SCALE(sib) (((sib) >> 6) & 0x3)
87#define FASTTRAP_SIB_INDEX(sib) (((sib) >> 3) & 0x7)
88#define FASTTRAP_SIB_BASE(sib) ((sib) & 0x7)
89
90#define FASTTRAP_REX_W(rex) (((rex) >> 3) & 1)
91#define FASTTRAP_REX_R(rex) (((rex) >> 2) & 1)
92#define FASTTRAP_REX_X(rex) (((rex) >> 1) & 1)
93#define FASTTRAP_REX_B(rex) ((rex) & 1)
94#define FASTTRAP_REX(w, r, x, b) \
95 (0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b))
96
97/*
98 * Single-byte op-codes.
99 */
100#define FASTTRAP_PUSHL_EBP 0x55
101
102#define FASTTRAP_JO 0x70
103#define FASTTRAP_JNO 0x71
104#define FASTTRAP_JB 0x72
105#define FASTTRAP_JAE 0x73
106#define FASTTRAP_JE 0x74
107#define FASTTRAP_JNE 0x75
108#define FASTTRAP_JBE 0x76
109#define FASTTRAP_JA 0x77
110#define FASTTRAP_JS 0x78
111#define FASTTRAP_JNS 0x79
112#define FASTTRAP_JP 0x7a
113#define FASTTRAP_JNP 0x7b
114#define FASTTRAP_JL 0x7c
115#define FASTTRAP_JGE 0x7d
116#define FASTTRAP_JLE 0x7e
117#define FASTTRAP_JG 0x7f
118
119#define FASTTRAP_NOP 0x90
120
121#define FASTTRAP_MOV_EAX 0xb8
122#define FASTTRAP_MOV_ECX 0xb9
123
124#define FASTTRAP_RET16 0xc2
125#define FASTTRAP_RET 0xc3
126
127#define FASTTRAP_LOOPNZ 0xe0
128#define FASTTRAP_LOOPZ 0xe1
129#define FASTTRAP_LOOP 0xe2
130#define FASTTRAP_JCXZ 0xe3
131
132#define FASTTRAP_CALL 0xe8
133#define FASTTRAP_JMP32 0xe9
134#define FASTTRAP_JMP8 0xeb
135
136#define FASTTRAP_INT3 0xcc
137#define FASTTRAP_INT 0xcd
138#define T_DTRACE_RET 0x7f
139
140#define FASTTRAP_2_BYTE_OP 0x0f
141#define FASTTRAP_GROUP5_OP 0xff
142
143/*
144 * Two-byte op-codes (second byte only).
145 */
146#define FASTTRAP_0F_JO 0x80
147#define FASTTRAP_0F_JNO 0x81
148#define FASTTRAP_0F_JB 0x82
149#define FASTTRAP_0F_JAE 0x83
150#define FASTTRAP_0F_JE 0x84
151#define FASTTRAP_0F_JNE 0x85
152#define FASTTRAP_0F_JBE 0x86
153#define FASTTRAP_0F_JA 0x87
154#define FASTTRAP_0F_JS 0x88
155#define FASTTRAP_0F_JNS 0x89
156#define FASTTRAP_0F_JP 0x8a
157#define FASTTRAP_0F_JNP 0x8b
158#define FASTTRAP_0F_JL 0x8c
159#define FASTTRAP_0F_JGE 0x8d
160#define FASTTRAP_0F_JLE 0x8e
161#define FASTTRAP_0F_JG 0x8f
162
163#define FASTTRAP_EFLAGS_OF 0x800
164#define FASTTRAP_EFLAGS_DF 0x400
165#define FASTTRAP_EFLAGS_SF 0x080
166#define FASTTRAP_EFLAGS_ZF 0x040
167#define FASTTRAP_EFLAGS_AF 0x010
168#define FASTTRAP_EFLAGS_PF 0x004
169#define FASTTRAP_EFLAGS_CF 0x001
170
171/*
172 * Instruction prefixes.
173 */
174#define FASTTRAP_PREFIX_OPERAND 0x66
175#define FASTTRAP_PREFIX_ADDRESS 0x67
176#define FASTTRAP_PREFIX_CS 0x2E
177#define FASTTRAP_PREFIX_DS 0x3E
178#define FASTTRAP_PREFIX_ES 0x26
179#define FASTTRAP_PREFIX_FS 0x64
180#define FASTTRAP_PREFIX_GS 0x65
181#define FASTTRAP_PREFIX_SS 0x36
182#define FASTTRAP_PREFIX_LOCK 0xF0
183#define FASTTRAP_PREFIX_REP 0xF3
184#define FASTTRAP_PREFIX_REPNE 0xF2
185
186#define FASTTRAP_NOREG 0xff
187
188/*
189 * Map between instruction register encodings and the kernel constants which
190 * correspond to indicies into struct regs.
191 */
192
193/*
194 * APPLE NOTE: We are cheating here. The regmap is used to decode which register
195 * a given instruction is trying to reference. OS X does not have extended registers
196 * for 32 bit apps, but the *order* is the same. So for 32 bit state, we will return:
197 *
198 * REG_RAX -> EAX
199 * REG_RCX -> ECX
200 * REG_RDX -> EDX
201 * REG_RBX -> EBX
202 * REG_RSP -> UESP
203 * REG_RBP -> EBP
204 * REG_RSI -> ESI
205 * REG_RDI -> EDI
206 *
207 * The fasttrap_getreg function knows how to make the correct transformation.
208 */
209static const uint8_t regmap[16] = {
210 REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI,
211 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15,
212};
213
214static user_addr_t fasttrap_getreg(x86_saved_state_t *, uint_t);
215
216static uint64_t
217fasttrap_anarg(x86_saved_state_t *regs, int function_entry, int argno)
218{
219 uint64_t value;
220 int shift = function_entry ? 1 : 0;
221
222 x86_saved_state64_t *regs64;
223 x86_saved_state32_t *regs32;
224 unsigned int p_model;
225
226 if (is_saved_state64(regs)) {
227 regs64 = saved_state64(regs);
228 regs32 = NULL;
229 p_model = DATAMODEL_LP64;
230 } else {
231 regs64 = NULL;
232 regs32 = saved_state32(regs);
233 p_model = DATAMODEL_ILP32;
234 }
235
236 if (p_model == DATAMODEL_LP64) {
237 user_addr_t stack;
238
239 /*
240 * In 64-bit mode, the first six arguments are stored in
241 * registers.
242 */
243 if (argno < 6)
244 return ((&regs64->rdi)[argno]);
245
246 stack = regs64->isf.rsp + sizeof(uint64_t) * (argno - 6 + shift);
247 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
248 value = dtrace_fuword64(stack);
249 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
250 } else {
251 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp);
252 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
253 value = dtrace_fuword32((user_addr_t)(unsigned long)&stack[argno + shift]);
254 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
255 }
256
257 return (value);
258}
259
260/*ARGSUSED*/
261int
262fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, user_addr_t pc,
263 fasttrap_probe_type_t type)
264{
265#pragma unused(type)
266 uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10];
267 size_t len = FASTTRAP_MAX_INSTR_SIZE;
268 size_t first = MIN(len, PAGE_SIZE - (pc & PAGE_MASK));
269 uint_t start = 0;
270 size_t size;
271 int rmindex;
272 uint8_t seg, rex = 0;
273 unsigned int p_model = (p->p_flag & P_LP64) ? DATAMODEL_LP64 : DATAMODEL_ILP32;
274
275 /*
276 * Read the instruction at the given address out of the process's
277 * address space. We don't have to worry about a debugger
278 * changing this instruction before we overwrite it with our trap
279 * instruction since P_PR_LOCK is set. Since instructions can span
280 * pages, we potentially read the instruction in two parts. If the
281 * second part fails, we just zero out that part of the instruction.
282 */
283 /*
284 * APPLE NOTE: Of course, we do not have a P_PR_LOCK, so this is racey...
285 */
286 if (uread(p, &instr[0], first, pc) != 0)
287 return (-1);
288 if (len > first &&
289 uread(p, &instr[first], len - first, pc + first) != 0) {
290 bzero(&instr[first], len - first);
291 len = first;
292 }
293
294 /*
295 * If the disassembly fails, then we have a malformed instruction.
296 */
297 if ((size = dtrace_instr_size_isa(instr, p_model, &rmindex)) <= 0)
298 return (-1);
299
300 /*
301 * Make sure the disassembler isn't completely broken.
302 */
303 ASSERT(-1 <= rmindex && rmindex < (int)size);
304
305 /*
306 * If the computed size is greater than the number of bytes read,
307 * then it was a malformed instruction possibly because it fell on a
308 * page boundary and the subsequent page was missing or because of
309 * some malicious user.
310 */
311 if (size > len)
312 return (-1);
313
314 tp->ftt_size = (uint8_t)size;
315 tp->ftt_segment = FASTTRAP_SEG_NONE;
316
317 /*
318 * Find the start of the instruction's opcode by processing any
319 * legacy prefixes.
320 */
321 for (;;) {
322 seg = 0;
323 switch (instr[start]) {
324 case FASTTRAP_PREFIX_SS:
325 seg++;
326 /*FALLTHRU*/
327 case FASTTRAP_PREFIX_GS:
328 seg++;
329 /*FALLTHRU*/
330 case FASTTRAP_PREFIX_FS:
331 seg++;
332 /*FALLTHRU*/
333 case FASTTRAP_PREFIX_ES:
334 seg++;
335 /*FALLTHRU*/
336 case FASTTRAP_PREFIX_DS:
337 seg++;
338 /*FALLTHRU*/
339 case FASTTRAP_PREFIX_CS:
340 seg++;
341 /*FALLTHRU*/
342 case FASTTRAP_PREFIX_OPERAND:
343 case FASTTRAP_PREFIX_ADDRESS:
344 case FASTTRAP_PREFIX_LOCK:
345 case FASTTRAP_PREFIX_REP:
346 case FASTTRAP_PREFIX_REPNE:
347 if (seg != 0) {
348 /*
349 * It's illegal for an instruction to specify
350 * two segment prefixes -- give up on this
351 * illegal instruction.
352 */
353 if (tp->ftt_segment != FASTTRAP_SEG_NONE)
354 return (-1);
355
356 tp->ftt_segment = seg;
357 }
358 start++;
359 continue;
360 }
361 break;
362 }
363
364 /*
365 * Identify the REX prefix on 64-bit processes.
366 */
367 if (p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40)
368 rex = instr[start++];
369
370 /*
371 * Now that we're pretty sure that the instruction is okay, copy the
372 * valid part to the tracepoint.
373 */
374 bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE);
375
376 tp->ftt_type = FASTTRAP_T_COMMON;
377 if (instr[start] == FASTTRAP_2_BYTE_OP) {
378 switch (instr[start + 1]) {
379 case FASTTRAP_0F_JO:
380 case FASTTRAP_0F_JNO:
381 case FASTTRAP_0F_JB:
382 case FASTTRAP_0F_JAE:
383 case FASTTRAP_0F_JE:
384 case FASTTRAP_0F_JNE:
385 case FASTTRAP_0F_JBE:
386 case FASTTRAP_0F_JA:
387 case FASTTRAP_0F_JS:
388 case FASTTRAP_0F_JNS:
389 case FASTTRAP_0F_JP:
390 case FASTTRAP_0F_JNP:
391 case FASTTRAP_0F_JL:
392 case FASTTRAP_0F_JGE:
393 case FASTTRAP_0F_JLE:
394 case FASTTRAP_0F_JG:
395 tp->ftt_type = FASTTRAP_T_JCC;
396 tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO;
397 tp->ftt_dest = pc + tp->ftt_size +
398 /* LINTED - alignment */
399 *(int32_t *)&instr[start + 2];
400 break;
401 }
402 } else if (instr[start] == FASTTRAP_GROUP5_OP) {
403 uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]);
404 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]);
405 uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]);
406
407 if (reg == 2 || reg == 4) {
408 uint_t i, sz;
409
410 if (reg == 2)
411 tp->ftt_type = FASTTRAP_T_CALL;
412 else
413 tp->ftt_type = FASTTRAP_T_JMP;
414
415 if (mod == 3)
416 tp->ftt_code = 2;
417 else
418 tp->ftt_code = 1;
419
420 ASSERT(p_model == DATAMODEL_LP64 || rex == 0);
421
422 /*
423 * See AMD x86-64 Architecture Programmer's Manual
424 * Volume 3, Section 1.2.7, Table 1-12, and
425 * Appendix A.3.1, Table A-15.
426 */
427 if (mod != 3 && rm == 4) {
428 uint8_t sib = instr[start + 2];
429 uint_t index = FASTTRAP_SIB_INDEX(sib);
430 uint_t base = FASTTRAP_SIB_BASE(sib);
431
432 tp->ftt_scale = FASTTRAP_SIB_SCALE(sib);
433
434 tp->ftt_index = (index == 4) ?
435 FASTTRAP_NOREG :
436 regmap[index | (FASTTRAP_REX_X(rex) << 3)];
437 tp->ftt_base = (mod == 0 && base == 5) ?
438 FASTTRAP_NOREG :
439 regmap[base | (FASTTRAP_REX_B(rex) << 3)];
440
441 i = 3;
442 sz = mod == 1 ? 1 : 4;
443 } else {
444 /*
445 * In 64-bit mode, mod == 0 and r/m == 5
446 * denotes %rip-relative addressing; in 32-bit
447 * mode, the base register isn't used. In both
448 * modes, there is a 32-bit operand.
449 */
450 if (mod == 0 && rm == 5) {
451 if (p_model == DATAMODEL_LP64)
452 tp->ftt_base = REG_RIP;
453 else
454 tp->ftt_base = FASTTRAP_NOREG;
455 sz = 4;
456 } else {
457 uint8_t base = rm |
458 (FASTTRAP_REX_B(rex) << 3);
459
460 tp->ftt_base = regmap[base];
461 sz = mod == 1 ? 1 : mod == 2 ? 4 : 0;
462 }
463 tp->ftt_index = FASTTRAP_NOREG;
464 i = 2;
465 }
466
467 if (sz == 1) {
468 tp->ftt_dest = *(int8_t *)&instr[start + i];
469 } else if (sz == 4) {
470 /* LINTED - alignment */
471 tp->ftt_dest = *(int32_t *)&instr[start + i];
472 } else {
473 tp->ftt_dest = 0;
474 }
475 }
476 } else {
477 switch (instr[start]) {
478 case FASTTRAP_RET:
479 tp->ftt_type = FASTTRAP_T_RET;
480 break;
481
482 case FASTTRAP_RET16:
483 tp->ftt_type = FASTTRAP_T_RET16;
484 /* LINTED - alignment */
485 tp->ftt_dest = *(uint16_t *)&instr[start + 1];
486 break;
487
488 case FASTTRAP_JO:
489 case FASTTRAP_JNO:
490 case FASTTRAP_JB:
491 case FASTTRAP_JAE:
492 case FASTTRAP_JE:
493 case FASTTRAP_JNE:
494 case FASTTRAP_JBE:
495 case FASTTRAP_JA:
496 case FASTTRAP_JS:
497 case FASTTRAP_JNS:
498 case FASTTRAP_JP:
499 case FASTTRAP_JNP:
500 case FASTTRAP_JL:
501 case FASTTRAP_JGE:
502 case FASTTRAP_JLE:
503 case FASTTRAP_JG:
504 tp->ftt_type = FASTTRAP_T_JCC;
505 tp->ftt_code = instr[start];
506 tp->ftt_dest = pc + tp->ftt_size +
507 (int8_t)instr[start + 1];
508 break;
509
510 case FASTTRAP_LOOPNZ:
511 case FASTTRAP_LOOPZ:
512 case FASTTRAP_LOOP:
513 tp->ftt_type = FASTTRAP_T_LOOP;
514 tp->ftt_code = instr[start];
515 tp->ftt_dest = pc + tp->ftt_size +
516 (int8_t)instr[start + 1];
517 break;
518
519 case FASTTRAP_JCXZ:
520 tp->ftt_type = FASTTRAP_T_JCXZ;
521 tp->ftt_dest = pc + tp->ftt_size +
522 (int8_t)instr[start + 1];
523 break;
524
525 case FASTTRAP_CALL:
526 tp->ftt_type = FASTTRAP_T_CALL;
527 tp->ftt_dest = pc + tp->ftt_size +
528 /* LINTED - alignment */
529 *(int32_t *)&instr[start + 1];
530 tp->ftt_code = 0;
531 break;
532
533 case FASTTRAP_JMP32:
534 tp->ftt_type = FASTTRAP_T_JMP;
535 tp->ftt_dest = pc + tp->ftt_size +
536 /* LINTED - alignment */
537 *(int32_t *)&instr[start + 1];
538 break;
539 case FASTTRAP_JMP8:
540 tp->ftt_type = FASTTRAP_T_JMP;
541 tp->ftt_dest = pc + tp->ftt_size +
542 (int8_t)instr[start + 1];
543 break;
544
545 case FASTTRAP_PUSHL_EBP:
546 if (start == 0)
547 tp->ftt_type = FASTTRAP_T_PUSHL_EBP;
548 break;
549
550 case FASTTRAP_NOP:
551 ASSERT(p_model == DATAMODEL_LP64 || rex == 0);
552
553 /*
554 * On sol64 we have to be careful not to confuse a nop
555 * (actually xchgl %eax, %eax) with an instruction using
556 * the same opcode, but that does something different
557 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax).
558 */
559 if (FASTTRAP_REX_B(rex) == 0)
560 tp->ftt_type = FASTTRAP_T_NOP;
561 break;
562
563 case FASTTRAP_INT3:
564 /*
565 * The pid provider shares the int3 trap with debugger
566 * breakpoints so we can't instrument them.
567 */
568 ASSERT(instr[start] == FASTTRAP_INSTR);
569 return (-1);
570
571 case FASTTRAP_INT:
572 /*
573 * Interrupts seem like they could be traced with
574 * no negative implications, but it's possible that
575 * a thread could be redirected by the trap handling
576 * code which would eventually return to the
577 * instruction after the interrupt. If the interrupt
578 * were in our scratch space, the subsequent
579 * instruction might be overwritten before we return.
580 * Accordingly we refuse to instrument any interrupt.
581 */
582 return (-1);
583 }
584 }
585
586 if (p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) {
587 /*
588 * If the process is 64-bit and the instruction type is still
589 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an
590 * execute it -- we need to watch for %rip-relative
591 * addressing mode. See the portion of fasttrap_pid_probe()
592 * below where we handle tracepoints with type
593 * FASTTRAP_T_COMMON for how we emulate instructions that
594 * employ %rip-relative addressing.
595 */
596 if (rmindex != -1) {
597 uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]);
598 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]);
599 uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]);
600
601 ASSERT(rmindex > (int)start);
602
603 if (mod == 0 && rm == 5) {
604 /*
605 * We need to be sure to avoid other
606 * registers used by this instruction. While
607 * the reg field may determine the op code
608 * rather than denoting a register, assuming
609 * that it denotes a register is always safe.
610 * We leave the REX field intact and use
611 * whatever value's there for simplicity.
612 */
613 if (reg != 0) {
614 tp->ftt_ripmode = FASTTRAP_RIP_1 |
615 (FASTTRAP_RIP_X *
616 FASTTRAP_REX_B(rex));
617 rm = 0;
618 } else {
619 tp->ftt_ripmode = FASTTRAP_RIP_2 |
620 (FASTTRAP_RIP_X *
621 FASTTRAP_REX_B(rex));
622 rm = 1;
623 }
624
625 tp->ftt_modrm = tp->ftt_instr[rmindex];
626 tp->ftt_instr[rmindex] =
627 FASTTRAP_MODRM(2, reg, rm);
628 }
629 }
630 }
631
632 return (0);
633}
634
635int
636fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp)
637{
638 fasttrap_instr_t instr = FASTTRAP_INSTR;
639
640 if (uwrite(p, &instr, 1, tp->ftt_pc) != 0)
641 return (-1);
642
643 tp->ftt_installed = 1;
644
645 return (0);
646}
647
648int
649fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp)
650{
651 uint8_t instr;
652
653 /*
654 * Distinguish between read or write failures and a changed
655 * instruction.
656 */
657 if (uread(p, &instr, 1, tp->ftt_pc) != 0)
658 goto end;
659 if (instr != FASTTRAP_INSTR)
660 goto end;
661 if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0)
662 return (-1);
663end:
664 tp->ftt_installed = 0;
665
666 return (0);
667}
668
669static void
670fasttrap_return_common(x86_saved_state_t *regs, user_addr_t pc, pid_t pid,
671 user_addr_t new_pc)
672{
673 x86_saved_state64_t *regs64;
674 x86_saved_state32_t *regs32;
675 unsigned int p_model;
676 int retire_tp = 1;
677
678 dtrace_icookie_t cookie;
679
680 if (is_saved_state64(regs)) {
681 regs64 = saved_state64(regs);
682 regs32 = NULL;
683 p_model = DATAMODEL_LP64;
684 } else {
685 regs64 = NULL;
686 regs32 = saved_state32(regs);
687 p_model = DATAMODEL_ILP32;
688 }
689
690 fasttrap_tracepoint_t *tp;
691 fasttrap_bucket_t *bucket;
692 fasttrap_id_t *id;
693 lck_mtx_t *pid_mtx;
694
695 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
696 lck_mtx_lock(pid_mtx);
697 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
698
699 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
700 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
701 tp->ftt_proc->ftpc_acount != 0)
702 break;
703 }
704
705 /*
706 * Don't sweat it if we can't find the tracepoint again; unlike
707 * when we're in fasttrap_pid_probe(), finding the tracepoint here
708 * is not essential to the correct execution of the process.
709 */
710 if (tp == NULL) {
711 lck_mtx_unlock(pid_mtx);
712 return;
713 }
714
715 for (id = tp->ftt_retids; id != NULL; id = id->fti_next) {
716 fasttrap_probe_t *probe = id->fti_probe;
717 /*
718 * If there's a branch that could act as a return site, we
719 * need to trace it, and check here if the program counter is
720 * external to the function.
721 */
722 if (tp->ftt_type != FASTTRAP_T_RET &&
723 tp->ftt_type != FASTTRAP_T_RET16 &&
724 new_pc - probe->ftp_faddr < probe->ftp_fsize)
725 continue;
726
727 if (probe->ftp_prov->ftp_provider_type == DTFTP_PROVIDER_ONESHOT) {
728 uint8_t already_triggered = atomic_or_8(&probe->ftp_triggered, 1);
729 if (already_triggered) {
730 continue;
731 }
732 }
733 /*
734 * If we have at least one probe associated that
735 * is not a oneshot probe, don't remove the
736 * tracepoint
737 */
738 else {
739 retire_tp = 0;
740 }
741 /*
742 * Provide a hint to the stack trace functions to add the
743 * following pc to the top of the stack since it's missing
744 * on a return probe yet highly desirable for consistency.
745 */
746 cookie = dtrace_interrupt_disable();
747 cpu_core[CPU->cpu_id].cpuc_missing_tos = pc;
748 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) {
749 dtrace_probe(dtrace_probeid_error, 0 /* state */, probe->ftp_id,
750 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV);
751 } else if (p_model == DATAMODEL_LP64) {
752 dtrace_probe(probe->ftp_id,
753 pc - id->fti_probe->ftp_faddr,
754 regs64->rax, regs64->rdx, 0, 0);
755 } else {
756 dtrace_probe(probe->ftp_id,
757 pc - id->fti_probe->ftp_faddr,
758 regs32->eax, regs32->edx, 0, 0);
759 }
760 /* remove the hint */
761 cpu_core[CPU->cpu_id].cpuc_missing_tos = 0;
762 dtrace_interrupt_enable(cookie);
763 }
764
765 lck_mtx_unlock(pid_mtx);
766}
767
768static void
769fasttrap_sigsegv(proc_t *p, uthread_t t, user_addr_t addr)
770{
771 proc_lock(p);
772
773 /* Set fault address and mark signal */
774 t->uu_code = addr;
775 t->uu_siglist |= sigmask(SIGSEGV);
776
777 /*
778 * XXX These two line may be redundant; if not, then we need
779 * XXX to potentially set the data address in the machine
780 * XXX specific thread state structure to indicate the address.
781 */
782 t->uu_exception = KERN_INVALID_ADDRESS; /* SIGSEGV */
783 t->uu_subcode = 0; /* XXX pad */
784
785 proc_unlock(p);
786
787 /* raise signal */
788 signal_setast(t->uu_context.vc_thread);
789}
790
791static void
792fasttrap_usdt_args64(fasttrap_probe_t *probe, x86_saved_state64_t *regs64, int argc,
793 uint64_t *argv)
794{
795 int i, x, cap = MIN(argc, probe->ftp_nargs);
796 user_addr_t stack = (user_addr_t)regs64->isf.rsp;
797
798 for (i = 0; i < cap; i++) {
799 x = probe->ftp_argmap[i];
800
801 if (x < 6) {
802 /* FIXME! This may be broken, needs testing */
803 argv[i] = (&regs64->rdi)[x];
804 } else {
805 fasttrap_fuword64_noerr(stack + (x * sizeof(uint64_t)), &argv[i]);
806 }
807 }
808
809 for (; i < argc; i++) {
810 argv[i] = 0;
811 }
812}
813
814static void
815fasttrap_usdt_args32(fasttrap_probe_t *probe, x86_saved_state32_t *regs32, int argc,
816 uint32_t *argv)
817{
818 int i, x, cap = MIN(argc, probe->ftp_nargs);
819 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp);
820
821 for (i = 0; i < cap; i++) {
822 x = probe->ftp_argmap[i];
823
824 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[x], &argv[i]);
825 }
826
827 for (; i < argc; i++) {
828 argv[i] = 0;
829 }
830}
831
832/*
833 * FIXME!
834 */
835static int
836fasttrap_do_seg(fasttrap_tracepoint_t *tp, x86_saved_state_t *rp, user_addr_t *addr) // 64 bit
837{
838#pragma unused(tp, rp, addr)
839 printf("fasttrap_do_seg() called while unimplemented.\n");
840#if 0
841 proc_t *p = curproc;
842 user_desc_t *desc;
843 uint16_t sel, ndx, type;
844 uintptr_t limit;
845
846 switch (tp->ftt_segment) {
847 case FASTTRAP_SEG_CS:
848 sel = rp->r_cs;
849 break;
850 case FASTTRAP_SEG_DS:
851 sel = rp->r_ds;
852 break;
853 case FASTTRAP_SEG_ES:
854 sel = rp->r_es;
855 break;
856 case FASTTRAP_SEG_FS:
857 sel = rp->r_fs;
858 break;
859 case FASTTRAP_SEG_GS:
860 sel = rp->r_gs;
861 break;
862 case FASTTRAP_SEG_SS:
863 sel = rp->r_ss;
864 break;
865 }
866
867 /*
868 * Make sure the given segment register specifies a user priority
869 * selector rather than a kernel selector.
870 */
871 if (!SELISUPL(sel))
872 return (-1);
873
874 ndx = SELTOIDX(sel);
875
876 /*
877 * Check the bounds and grab the descriptor out of the specified
878 * descriptor table.
879 */
880 if (SELISLDT(sel)) {
881 if (ndx > p->p_ldtlimit)
882 return (-1);
883
884 desc = p->p_ldt + ndx;
885
886 } else {
887 if (ndx >= NGDT)
888 return (-1);
889
890 desc = cpu_get_gdt() + ndx;
891 }
892
893 /*
894 * The descriptor must have user privilege level and it must be
895 * present in memory.
896 */
897 if (desc->usd_dpl != SEL_UPL || desc->usd_p != 1)
898 return (-1);
899
900 type = desc->usd_type;
901
902 /*
903 * If the S bit in the type field is not set, this descriptor can
904 * only be used in system context.
905 */
906 if ((type & 0x10) != 0x10)
907 return (-1);
908
909 limit = USEGD_GETLIMIT(desc) * (desc->usd_gran ? PAGESIZE : 1);
910
911 if (tp->ftt_segment == FASTTRAP_SEG_CS) {
912 /*
913 * The code/data bit and readable bit must both be set.
914 */
915 if ((type & 0xa) != 0xa)
916 return (-1);
917
918 if (*addr > limit)
919 return (-1);
920 } else {
921 /*
922 * The code/data bit must be clear.
923 */
924 if ((type & 0x8) != 0)
925 return (-1);
926
927 /*
928 * If the expand-down bit is clear, we just check the limit as
929 * it would naturally be applied. Otherwise, we need to check
930 * that the address is the range [limit + 1 .. 0xffff] or
931 * [limit + 1 ... 0xffffffff] depending on if the default
932 * operand size bit is set.
933 */
934 if ((type & 0x4) == 0) {
935 if (*addr > limit)
936 return (-1);
937 } else if (desc->usd_def32) {
938 if (*addr < limit + 1 || 0xffff < *addr)
939 return (-1);
940 } else {
941 if (*addr < limit + 1 || 0xffffffff < *addr)
942 return (-1);
943 }
944 }
945
946 *addr += USEGD_GETBASE(desc);
947#endif /* 0 */
948 return (0);
949}
950
951/*
952 * Due to variances between Solaris and xnu, I have split this into a 32 bit and 64 bit
953 * code path. It still takes an x86_saved_state_t* argument, because it must sometimes
954 * call other methods that require a x86_saved_state_t.
955 *
956 * NOTE!!!!
957 *
958 * Any changes made to this method must be echo'd in fasttrap_pid_probe64!
959 *
960 */
961static int
962fasttrap_pid_probe32(x86_saved_state_t *regs)
963{
964 ASSERT(is_saved_state32(regs));
965
966 x86_saved_state32_t *regs32 = saved_state32(regs);
967 user_addr_t pc = regs32->eip - 1;
968 proc_t *p = current_proc();
969 user_addr_t new_pc = 0;
970 fasttrap_bucket_t *bucket;
971 lck_mtx_t *pid_mtx;
972 fasttrap_tracepoint_t *tp, tp_local;
973 pid_t pid;
974 dtrace_icookie_t cookie;
975 uint_t is_enabled = 0, retire_tp = 1;
976
977 uthread_t uthread = (uthread_t)get_bsdthread_info(current_thread());
978
979 /*
980 * It's possible that a user (in a veritable orgy of bad planning)
981 * could redirect this thread's flow of control before it reached the
982 * return probe fasttrap. In this case we need to kill the process
983 * since it's in a unrecoverable state.
984 */
985 if (uthread->t_dtrace_step) {
986 ASSERT(uthread->t_dtrace_on);
987 fasttrap_sigtrap(p, uthread, pc);
988 return (0);
989 }
990
991 /*
992 * Clear all user tracing flags.
993 */
994 uthread->t_dtrace_ft = 0;
995 uthread->t_dtrace_pc = 0;
996 uthread->t_dtrace_npc = 0;
997 uthread->t_dtrace_scrpc = 0;
998 uthread->t_dtrace_astpc = 0;
999
1000 /*
1001 * Treat a child created by a call to vfork(2) as if it were its
1002 * parent. We know that there's only one thread of control in such a
1003 * process: this one.
1004 */
1005 if (p->p_lflag & P_LINVFORK) {
1006 proc_list_lock();
1007 while (p->p_lflag & P_LINVFORK)
1008 p = p->p_pptr;
1009 proc_list_unlock();
1010 }
1011
1012 pid = p->p_pid;
1013 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
1014 lck_mtx_lock(pid_mtx);
1015 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
1016
1017 /*
1018 * Lookup the tracepoint that the process just hit.
1019 */
1020 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
1021 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
1022 tp->ftt_proc->ftpc_acount != 0)
1023 break;
1024 }
1025
1026 /*
1027 * If we couldn't find a matching tracepoint, either a tracepoint has
1028 * been inserted without using the pid<pid> ioctl interface (see
1029 * fasttrap_ioctl), or somehow we have mislaid this tracepoint.
1030 */
1031 if (tp == NULL) {
1032 lck_mtx_unlock(pid_mtx);
1033 return (-1);
1034 }
1035
1036 /*
1037 * Set the program counter to the address of the traced instruction
1038 * so that it looks right in ustack() output.
1039 */
1040 regs32->eip = pc;
1041
1042 if (tp->ftt_ids != NULL) {
1043 fasttrap_id_t *id;
1044
1045 uint32_t s0, s1, s2, s3, s4, s5;
1046 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp);
1047
1048 /*
1049 * In 32-bit mode, all arguments are passed on the
1050 * stack. If this is a function entry probe, we need
1051 * to skip the first entry on the stack as it
1052 * represents the return address rather than a
1053 * parameter to the function.
1054 */
1055 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[0], &s0);
1056 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[1], &s1);
1057 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[2], &s2);
1058 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[3], &s3);
1059 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[4], &s4);
1060 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[5], &s5);
1061
1062 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1063 fasttrap_probe_t *probe = id->fti_probe;
1064
1065 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) {
1066 dtrace_probe(dtrace_probeid_error, 0 /* state */, probe->ftp_id,
1067 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV);
1068 } else {
1069 if (probe->ftp_prov->ftp_provider_type == DTFTP_PROVIDER_ONESHOT) {
1070 uint8_t already_triggered = atomic_or_8(&probe->ftp_triggered, 1);
1071 if (already_triggered) {
1072 continue;
1073 }
1074 }
1075 /*
1076 * If we have at least one probe associated that
1077 * is not a oneshot probe, don't remove the
1078 * tracepoint
1079 */
1080 else {
1081 retire_tp = 0;
1082 }
1083 if (id->fti_ptype == DTFTP_ENTRY) {
1084 /*
1085 * We note that this was an entry
1086 * probe to help ustack() find the
1087 * first caller.
1088 */
1089 cookie = dtrace_interrupt_disable();
1090 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1091 dtrace_probe(probe->ftp_id, s1, s2,
1092 s3, s4, s5);
1093 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1094 dtrace_interrupt_enable(cookie);
1095 } else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1096 /*
1097 * Note that in this case, we don't
1098 * call dtrace_probe() since it's only
1099 * an artificial probe meant to change
1100 * the flow of control so that it
1101 * encounters the true probe.
1102 */
1103 is_enabled = 1;
1104 } else if (probe->ftp_argmap == NULL) {
1105 dtrace_probe(probe->ftp_id, s0, s1,
1106 s2, s3, s4);
1107 } else {
1108 uint32_t t[5];
1109
1110 fasttrap_usdt_args32(probe, regs32,
1111 sizeof (t) / sizeof (t[0]), t);
1112
1113 dtrace_probe(probe->ftp_id, t[0], t[1],
1114 t[2], t[3], t[4]);
1115 }
1116 }
1117 }
1118 if (retire_tp) {
1119 fasttrap_tracepoint_retire(p, tp);
1120 }
1121 }
1122
1123 /*
1124 * We're about to do a bunch of work so we cache a local copy of
1125 * the tracepoint to emulate the instruction, and then find the
1126 * tracepoint again later if we need to light up any return probes.
1127 */
1128 tp_local = *tp;
1129 lck_mtx_unlock(pid_mtx);
1130 tp = &tp_local;
1131
1132 /*
1133 * Set the program counter to appear as though the traced instruction
1134 * had completely executed. This ensures that fasttrap_getreg() will
1135 * report the expected value for REG_RIP.
1136 */
1137 regs32->eip = pc + tp->ftt_size;
1138
1139 /*
1140 * If there's an is-enabled probe connected to this tracepoint it
1141 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax'
1142 * instruction that was placed there by DTrace when the binary was
1143 * linked. As this probe is, in fact, enabled, we need to stuff 1
1144 * into %eax or %rax. Accordingly, we can bypass all the instruction
1145 * emulation logic since we know the inevitable result. It's possible
1146 * that a user could construct a scenario where the 'is-enabled'
1147 * probe was on some other instruction, but that would be a rather
1148 * exotic way to shoot oneself in the foot.
1149 */
1150 if (is_enabled) {
1151 regs32->eax = 1;
1152 new_pc = regs32->eip;
1153 goto done;
1154 }
1155
1156 /*
1157 * We emulate certain types of instructions to ensure correctness
1158 * (in the case of position dependent instructions) or optimize
1159 * common cases. The rest we have the thread execute back in user-
1160 * land.
1161 */
1162 switch (tp->ftt_type) {
1163 case FASTTRAP_T_RET:
1164 case FASTTRAP_T_RET16:
1165 {
1166 user_addr_t dst;
1167 user_addr_t addr;
1168 int ret;
1169
1170 /*
1171 * We have to emulate _every_ facet of the behavior of a ret
1172 * instruction including what happens if the load from %esp
1173 * fails; in that case, we send a SIGSEGV.
1174 */
1175 uint32_t dst32;
1176 ret = fasttrap_fuword32((user_addr_t)regs32->uesp, &dst32);
1177 dst = dst32;
1178 addr = regs32->uesp + sizeof (uint32_t);
1179
1180 if (ret == -1) {
1181 fasttrap_sigsegv(p, uthread, (user_addr_t)regs32->uesp);
1182 new_pc = pc;
1183 break;
1184 }
1185
1186 if (tp->ftt_type == FASTTRAP_T_RET16)
1187 addr += tp->ftt_dest;
1188
1189 regs32->uesp = addr;
1190 new_pc = dst;
1191 break;
1192 }
1193
1194 case FASTTRAP_T_JCC:
1195 {
1196 uint_t taken;
1197
1198 switch (tp->ftt_code) {
1199 case FASTTRAP_JO:
1200 taken = (regs32->efl & FASTTRAP_EFLAGS_OF) != 0;
1201 break;
1202 case FASTTRAP_JNO:
1203 taken = (regs32->efl & FASTTRAP_EFLAGS_OF) == 0;
1204 break;
1205 case FASTTRAP_JB:
1206 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) != 0;
1207 break;
1208 case FASTTRAP_JAE:
1209 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) == 0;
1210 break;
1211 case FASTTRAP_JE:
1212 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0;
1213 break;
1214 case FASTTRAP_JNE:
1215 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0;
1216 break;
1217 case FASTTRAP_JBE:
1218 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) != 0 ||
1219 (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0;
1220 break;
1221 case FASTTRAP_JA:
1222 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) == 0 &&
1223 (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0;
1224 break;
1225 case FASTTRAP_JS:
1226 taken = (regs32->efl & FASTTRAP_EFLAGS_SF) != 0;
1227 break;
1228 case FASTTRAP_JNS:
1229 taken = (regs32->efl & FASTTRAP_EFLAGS_SF) == 0;
1230 break;
1231 case FASTTRAP_JP:
1232 taken = (regs32->efl & FASTTRAP_EFLAGS_PF) != 0;
1233 break;
1234 case FASTTRAP_JNP:
1235 taken = (regs32->efl & FASTTRAP_EFLAGS_PF) == 0;
1236 break;
1237 case FASTTRAP_JL:
1238 taken = ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) !=
1239 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1240 break;
1241 case FASTTRAP_JGE:
1242 taken = ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) ==
1243 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1244 break;
1245 case FASTTRAP_JLE:
1246 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0 ||
1247 ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) !=
1248 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1249 break;
1250 case FASTTRAP_JG:
1251 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0 &&
1252 ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) ==
1253 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1254 break;
1255 default:
1256 taken = FALSE;
1257 }
1258
1259 if (taken)
1260 new_pc = tp->ftt_dest;
1261 else
1262 new_pc = pc + tp->ftt_size;
1263 break;
1264 }
1265
1266 case FASTTRAP_T_LOOP:
1267 {
1268 uint_t taken;
1269 greg_t cx = regs32->ecx--;
1270
1271 switch (tp->ftt_code) {
1272 case FASTTRAP_LOOPNZ:
1273 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0 &&
1274 cx != 0;
1275 break;
1276 case FASTTRAP_LOOPZ:
1277 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0 &&
1278 cx != 0;
1279 break;
1280 case FASTTRAP_LOOP:
1281 taken = (cx != 0);
1282 break;
1283 default:
1284 taken = FALSE;
1285 }
1286
1287 if (taken)
1288 new_pc = tp->ftt_dest;
1289 else
1290 new_pc = pc + tp->ftt_size;
1291 break;
1292 }
1293
1294 case FASTTRAP_T_JCXZ:
1295 {
1296 greg_t cx = regs32->ecx;
1297
1298 if (cx == 0)
1299 new_pc = tp->ftt_dest;
1300 else
1301 new_pc = pc + tp->ftt_size;
1302 break;
1303 }
1304
1305 case FASTTRAP_T_PUSHL_EBP:
1306 {
1307 user_addr_t addr = regs32->uesp - sizeof (uint32_t);
1308 int ret = fasttrap_suword32(addr, (uint32_t)regs32->ebp);
1309
1310 if (ret == -1) {
1311 fasttrap_sigsegv(p, uthread, addr);
1312 new_pc = pc;
1313 break;
1314 }
1315
1316 regs32->uesp = addr;
1317 new_pc = pc + tp->ftt_size;
1318 break;
1319 }
1320
1321 case FASTTRAP_T_NOP:
1322 new_pc = pc + tp->ftt_size;
1323 break;
1324
1325 case FASTTRAP_T_JMP:
1326 case FASTTRAP_T_CALL:
1327 if (tp->ftt_code == 0) {
1328 new_pc = tp->ftt_dest;
1329 } else {
1330 user_addr_t /* value ,*/ addr = tp->ftt_dest;
1331
1332 if (tp->ftt_base != FASTTRAP_NOREG)
1333 addr += fasttrap_getreg(regs, tp->ftt_base);
1334 if (tp->ftt_index != FASTTRAP_NOREG)
1335 addr += fasttrap_getreg(regs, tp->ftt_index) <<
1336 tp->ftt_scale;
1337
1338 if (tp->ftt_code == 1) {
1339 /*
1340 * If there's a segment prefix for this
1341 * instruction, we'll need to check permissions
1342 * and bounds on the given selector, and adjust
1343 * the address accordingly.
1344 */
1345 if (tp->ftt_segment != FASTTRAP_SEG_NONE &&
1346 fasttrap_do_seg(tp, regs, &addr) != 0) {
1347 fasttrap_sigsegv(p, uthread, addr);
1348 new_pc = pc;
1349 break;
1350 }
1351
1352 uint32_t value32;
1353 addr = (user_addr_t)(uint32_t)addr;
1354 if (fasttrap_fuword32(addr, &value32) == -1) {
1355 fasttrap_sigsegv(p, uthread, addr);
1356 new_pc = pc;
1357 break;
1358 }
1359 new_pc = value32;
1360 } else {
1361 new_pc = addr;
1362 }
1363 }
1364
1365 /*
1366 * If this is a call instruction, we need to push the return
1367 * address onto the stack. If this fails, we send the process
1368 * a SIGSEGV and reset the pc to emulate what would happen if
1369 * this instruction weren't traced.
1370 */
1371 if (tp->ftt_type == FASTTRAP_T_CALL) {
1372 user_addr_t addr = regs32->uesp - sizeof (uint32_t);
1373 int ret = fasttrap_suword32(addr, (uint32_t)(pc + tp->ftt_size));
1374
1375 if (ret == -1) {
1376 fasttrap_sigsegv(p, uthread, addr);
1377 new_pc = pc;
1378 break;
1379 }
1380
1381 regs32->uesp = addr;
1382 }
1383 break;
1384
1385 case FASTTRAP_T_COMMON:
1386 {
1387 user_addr_t addr, write_addr;
1388 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7];
1389 uint_t i = 0;
1390
1391 /*
1392 * Generic Instruction Tracing
1393 * ---------------------------
1394 *
1395 * This is the layout of the scratch space in the user-land
1396 * thread structure for our generated instructions.
1397 *
1398 * 32-bit mode bytes
1399 * ------------------------ -----
1400 * a: <original instruction> <= 15
1401 * jmp <pc + tp->ftt_size> 5
1402 * b: <original instrction> <= 15
1403 * int T_DTRACE_RET 2
1404 * -----
1405 * <= 37
1406 *
1407 * 64-bit mode bytes
1408 * ------------------------ -----
1409 * a: <original instruction> <= 15
1410 * jmp 0(%rip) 6
1411 * <pc + tp->ftt_size> 8
1412 * b: <original instruction> <= 15
1413 * int T_DTRACE_RET 2
1414 * -----
1415 * <= 46
1416 *
1417 * The %pc is set to a, and curthread->t_dtrace_astpc is set
1418 * to b. If we encounter a signal on the way out of the
1419 * kernel, trap() will set %pc to curthread->t_dtrace_astpc
1420 * so that we execute the original instruction and re-enter
1421 * the kernel rather than redirecting to the next instruction.
1422 *
1423 * If there are return probes (so we know that we're going to
1424 * need to reenter the kernel after executing the original
1425 * instruction), the scratch space will just contain the
1426 * original instruction followed by an interrupt -- the same
1427 * data as at b.
1428 */
1429
1430 addr = uthread->t_dtrace_scratch->addr;
1431 write_addr = uthread->t_dtrace_scratch->write_addr;
1432
1433 if (addr == 0LL || write_addr == 0LL) {
1434 fasttrap_sigtrap(p, uthread, pc); // Should be killing target proc
1435 new_pc = pc;
1436 break;
1437 }
1438
1439 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE);
1440
1441 uthread->t_dtrace_scrpc = addr;
1442 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1443 i += tp->ftt_size;
1444
1445 /*
1446 * Set up the jmp to the next instruction; note that
1447 * the size of the traced instruction cancels out.
1448 */
1449 scratch[i++] = FASTTRAP_JMP32;
1450 /* LINTED - alignment */
1451 *(uint32_t *)&scratch[i] = pc - addr - 5;
1452 i += sizeof (uint32_t);
1453
1454 uthread->t_dtrace_astpc = addr + i;
1455 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1456 i += tp->ftt_size;
1457 scratch[i++] = FASTTRAP_INT;
1458 scratch[i++] = T_DTRACE_RET;
1459
1460 ASSERT(i <= sizeof (scratch));
1461
1462 if (fasttrap_copyout(scratch, write_addr, i)) {
1463 fasttrap_sigtrap(p, uthread, pc);
1464 new_pc = pc;
1465 break;
1466 }
1467
1468 if (tp->ftt_retids != NULL) {
1469 uthread->t_dtrace_step = 1;
1470 uthread->t_dtrace_ret = 1;
1471 new_pc = uthread->t_dtrace_astpc;
1472 } else {
1473 new_pc = uthread->t_dtrace_scrpc;
1474 }
1475
1476 uthread->t_dtrace_pc = pc;
1477 uthread->t_dtrace_npc = pc + tp->ftt_size;
1478 uthread->t_dtrace_on = 1;
1479 break;
1480 }
1481
1482 default:
1483 panic("fasttrap: mishandled an instruction");
1484 }
1485
1486done:
1487 /*
1488 * APPLE NOTE:
1489 *
1490 * We're setting this earlier than Solaris does, to get a "correct"
1491 * ustack() output. In the Sun code, a() -> b() -> c() -> d() is
1492 * reported at: d, b, a. The new way gives c, b, a, which is closer
1493 * to correct, as the return instruction has already exectued.
1494 */
1495 regs32->eip = new_pc;
1496
1497 /*
1498 * If there were no return probes when we first found the tracepoint,
1499 * we should feel no obligation to honor any return probes that were
1500 * subsequently enabled -- they'll just have to wait until the next
1501 * time around.
1502 */
1503 if (tp->ftt_retids != NULL) {
1504 /*
1505 * We need to wait until the results of the instruction are
1506 * apparent before invoking any return probes. If this
1507 * instruction was emulated we can just call
1508 * fasttrap_return_common(); if it needs to be executed, we
1509 * need to wait until the user thread returns to the kernel.
1510 */
1511 if (tp->ftt_type != FASTTRAP_T_COMMON) {
1512 fasttrap_return_common(regs, pc, pid, new_pc);
1513 } else {
1514 ASSERT(uthread->t_dtrace_ret != 0);
1515 ASSERT(uthread->t_dtrace_pc == pc);
1516 ASSERT(uthread->t_dtrace_scrpc != 0);
1517 ASSERT(new_pc == uthread->t_dtrace_astpc);
1518 }
1519 }
1520
1521 return (0);
1522}
1523
1524/*
1525 * Due to variances between Solaris and xnu, I have split this into a 32 bit and 64 bit
1526 * code path. It still takes an x86_saved_state_t* argument, because it must sometimes
1527 * call other methods that require a x86_saved_state_t.
1528 *
1529 * NOTE!!!!
1530 *
1531 * Any changes made to this method must be echo'd in fasttrap_pid_probe32!
1532 *
1533 */
1534static int
1535fasttrap_pid_probe64(x86_saved_state_t *regs)
1536{
1537 ASSERT(is_saved_state64(regs));
1538
1539 x86_saved_state64_t *regs64 = saved_state64(regs);
1540 user_addr_t pc = regs64->isf.rip - 1;
1541 proc_t *p = current_proc();
1542 user_addr_t new_pc = 0;
1543 fasttrap_bucket_t *bucket;
1544 lck_mtx_t *pid_mtx;
1545 fasttrap_tracepoint_t *tp, tp_local;
1546 pid_t pid;
1547 dtrace_icookie_t cookie;
1548 uint_t is_enabled = 0;
1549 int retire_tp = 1;
1550
1551 uthread_t uthread = (uthread_t)get_bsdthread_info(current_thread());
1552
1553 /*
1554 * It's possible that a user (in a veritable orgy of bad planning)
1555 * could redirect this thread's flow of control before it reached the
1556 * return probe fasttrap. In this case we need to kill the process
1557 * since it's in a unrecoverable state.
1558 */
1559 if (uthread->t_dtrace_step) {
1560 ASSERT(uthread->t_dtrace_on);
1561 fasttrap_sigtrap(p, uthread, pc);
1562 return (0);
1563 }
1564
1565 /*
1566 * Clear all user tracing flags.
1567 */
1568 uthread->t_dtrace_ft = 0;
1569 uthread->t_dtrace_pc = 0;
1570 uthread->t_dtrace_npc = 0;
1571 uthread->t_dtrace_scrpc = 0;
1572 uthread->t_dtrace_astpc = 0;
1573 uthread->t_dtrace_regv = 0;
1574
1575 /*
1576 * Treat a child created by a call to vfork(2) as if it were its
1577 * parent. We know that there's only one thread of control in such a
1578 * process: this one.
1579 */
1580 if (p->p_lflag & P_LINVFORK) {
1581 proc_list_lock();
1582 while (p->p_lflag & P_LINVFORK)
1583 p = p->p_pptr;
1584 proc_list_unlock();
1585 }
1586
1587 pid = p->p_pid;
1588 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
1589 lck_mtx_lock(pid_mtx);
1590 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
1591
1592 /*
1593 * Lookup the tracepoint that the process just hit.
1594 */
1595 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
1596 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
1597 tp->ftt_proc->ftpc_acount != 0)
1598 break;
1599 }
1600
1601 /*
1602 * If we couldn't find a matching tracepoint, either a tracepoint has
1603 * been inserted without using the pid<pid> ioctl interface (see
1604 * fasttrap_ioctl), or somehow we have mislaid this tracepoint.
1605 */
1606 if (tp == NULL) {
1607 lck_mtx_unlock(pid_mtx);
1608 return (-1);
1609 }
1610
1611 /*
1612 * Set the program counter to the address of the traced instruction
1613 * so that it looks right in ustack() output.
1614 */
1615 regs64->isf.rip = pc;
1616
1617 if (tp->ftt_ids != NULL) {
1618 fasttrap_id_t *id;
1619
1620 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1621 fasttrap_probe_t *probe = id->fti_probe;
1622
1623 if (probe->ftp_prov->ftp_provider_type == DTFTP_PROVIDER_ONESHOT) {
1624 uint8_t already_triggered = atomic_or_8(&probe->ftp_triggered, 1);
1625 if (already_triggered) {
1626 continue;
1627 }
1628 }
1629 /*
1630 * If we have at least probe associated that
1631 * is not a oneshot probe, don't remove the
1632 * tracepoint
1633 */
1634 else {
1635 retire_tp = 0;
1636 }
1637 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) {
1638 dtrace_probe(dtrace_probeid_error, 0 /* state */, probe->ftp_id,
1639 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV);
1640 } else if (id->fti_ptype == DTFTP_ENTRY) {
1641 /*
1642 * We note that this was an entry
1643 * probe to help ustack() find the
1644 * first caller.
1645 */
1646 cookie = dtrace_interrupt_disable();
1647 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1648 dtrace_probe(probe->ftp_id, regs64->rdi,
1649 regs64->rsi, regs64->rdx, regs64->rcx,
1650 regs64->r8);
1651 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1652 dtrace_interrupt_enable(cookie);
1653 } else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1654 /*
1655 * Note that in this case, we don't
1656 * call dtrace_probe() since it's only
1657 * an artificial probe meant to change
1658 * the flow of control so that it
1659 * encounters the true probe.
1660 */
1661 is_enabled = 1;
1662 } else if (probe->ftp_argmap == NULL) {
1663 dtrace_probe(probe->ftp_id, regs64->rdi,
1664 regs64->rsi, regs64->rdx, regs64->rcx,
1665 regs64->r8);
1666 } else {
1667 uint64_t t[5];
1668
1669 fasttrap_usdt_args64(probe, regs64,
1670 sizeof (t) / sizeof (t[0]), t);
1671
1672 dtrace_probe(probe->ftp_id, t[0], t[1],
1673 t[2], t[3], t[4]);
1674 }
1675
1676 }
1677 if (retire_tp) {
1678 fasttrap_tracepoint_retire(p, tp);
1679 }
1680 }
1681
1682 /*
1683 * We're about to do a bunch of work so we cache a local copy of
1684 * the tracepoint to emulate the instruction, and then find the
1685 * tracepoint again later if we need to light up any return probes.
1686 */
1687 tp_local = *tp;
1688 lck_mtx_unlock(pid_mtx);
1689 tp = &tp_local;
1690
1691 /*
1692 * Set the program counter to appear as though the traced instruction
1693 * had completely executed. This ensures that fasttrap_getreg() will
1694 * report the expected value for REG_RIP.
1695 */
1696 regs64->isf.rip = pc + tp->ftt_size;
1697
1698 /*
1699 * If there's an is-enabled probe connected to this tracepoint it
1700 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax'
1701 * instruction that was placed there by DTrace when the binary was
1702 * linked. As this probe is, in fact, enabled, we need to stuff 1
1703 * into %eax or %rax. Accordingly, we can bypass all the instruction
1704 * emulation logic since we know the inevitable result. It's possible
1705 * that a user could construct a scenario where the 'is-enabled'
1706 * probe was on some other instruction, but that would be a rather
1707 * exotic way to shoot oneself in the foot.
1708 */
1709 if (is_enabled) {
1710 regs64->rax = 1;
1711 new_pc = regs64->isf.rip;
1712 goto done;
1713 }
1714
1715 /*
1716 * We emulate certain types of instructions to ensure correctness
1717 * (in the case of position dependent instructions) or optimize
1718 * common cases. The rest we have the thread execute back in user-
1719 * land.
1720 */
1721 switch (tp->ftt_type) {
1722 case FASTTRAP_T_RET:
1723 case FASTTRAP_T_RET16:
1724 {
1725 user_addr_t dst;
1726 user_addr_t addr;
1727 int ret;
1728
1729 /*
1730 * We have to emulate _every_ facet of the behavior of a ret
1731 * instruction including what happens if the load from %esp
1732 * fails; in that case, we send a SIGSEGV.
1733 */
1734 ret = fasttrap_fuword64((user_addr_t)regs64->isf.rsp, &dst);
1735 addr = regs64->isf.rsp + sizeof (uint64_t);
1736
1737 if (ret == -1) {
1738 fasttrap_sigsegv(p, uthread, (user_addr_t)regs64->isf.rsp);
1739 new_pc = pc;
1740 break;
1741 }
1742
1743 if (tp->ftt_type == FASTTRAP_T_RET16)
1744 addr += tp->ftt_dest;
1745
1746 regs64->isf.rsp = addr;
1747 new_pc = dst;
1748 break;
1749 }
1750
1751 case FASTTRAP_T_JCC:
1752 {
1753 uint_t taken;
1754
1755 switch (tp->ftt_code) {
1756 case FASTTRAP_JO:
1757 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_OF) != 0;
1758 break;
1759 case FASTTRAP_JNO:
1760 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0;
1761 break;
1762 case FASTTRAP_JB:
1763 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) != 0;
1764 break;
1765 case FASTTRAP_JAE:
1766 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) == 0;
1767 break;
1768 case FASTTRAP_JE:
1769 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0;
1770 break;
1771 case FASTTRAP_JNE:
1772 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0;
1773 break;
1774 case FASTTRAP_JBE:
1775 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) != 0 ||
1776 (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0;
1777 break;
1778 case FASTTRAP_JA:
1779 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) == 0 &&
1780 (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0;
1781 break;
1782 case FASTTRAP_JS:
1783 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_SF) != 0;
1784 break;
1785 case FASTTRAP_JNS:
1786 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0;
1787 break;
1788 case FASTTRAP_JP:
1789 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_PF) != 0;
1790 break;
1791 case FASTTRAP_JNP:
1792 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_PF) == 0;
1793 break;
1794 case FASTTRAP_JL:
1795 taken = ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1796 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1797 break;
1798 case FASTTRAP_JGE:
1799 taken = ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1800 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1801 break;
1802 case FASTTRAP_JLE:
1803 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0 ||
1804 ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1805 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1806 break;
1807 case FASTTRAP_JG:
1808 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1809 ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1810 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1811 break;
1812 default:
1813 taken = FALSE;
1814 }
1815
1816 if (taken)
1817 new_pc = tp->ftt_dest;
1818 else
1819 new_pc = pc + tp->ftt_size;
1820 break;
1821 }
1822
1823 case FASTTRAP_T_LOOP:
1824 {
1825 uint_t taken;
1826 uint64_t cx = regs64->rcx--;
1827
1828 switch (tp->ftt_code) {
1829 case FASTTRAP_LOOPNZ:
1830 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1831 cx != 0;
1832 break;
1833 case FASTTRAP_LOOPZ:
1834 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0 &&
1835 cx != 0;
1836 break;
1837 case FASTTRAP_LOOP:
1838 taken = (cx != 0);
1839 break;
1840 default:
1841 taken = FALSE;
1842 }
1843
1844 if (taken)
1845 new_pc = tp->ftt_dest;
1846 else
1847 new_pc = pc + tp->ftt_size;
1848 break;
1849 }
1850
1851 case FASTTRAP_T_JCXZ:
1852 {
1853 uint64_t cx = regs64->rcx;
1854
1855 if (cx == 0)
1856 new_pc = tp->ftt_dest;
1857 else
1858 new_pc = pc + tp->ftt_size;
1859 break;
1860 }
1861
1862 case FASTTRAP_T_PUSHL_EBP:
1863 {
1864 user_addr_t addr = regs64->isf.rsp - sizeof (uint64_t);
1865 int ret = fasttrap_suword64(addr, (uint64_t)regs64->rbp);
1866
1867 if (ret == -1) {
1868 fasttrap_sigsegv(p, uthread, addr);
1869 new_pc = pc;
1870 break;
1871 }
1872
1873 regs64->isf.rsp = addr;
1874 new_pc = pc + tp->ftt_size;
1875 break;
1876 }
1877
1878 case FASTTRAP_T_NOP:
1879 new_pc = pc + tp->ftt_size;
1880 break;
1881
1882 case FASTTRAP_T_JMP:
1883 case FASTTRAP_T_CALL:
1884 if (tp->ftt_code == 0) {
1885 new_pc = tp->ftt_dest;
1886 } else {
1887 user_addr_t value, addr = tp->ftt_dest;
1888
1889 if (tp->ftt_base != FASTTRAP_NOREG)
1890 addr += fasttrap_getreg(regs, tp->ftt_base);
1891 if (tp->ftt_index != FASTTRAP_NOREG)
1892 addr += fasttrap_getreg(regs, tp->ftt_index) <<
1893 tp->ftt_scale;
1894
1895 if (tp->ftt_code == 1) {
1896 /*
1897 * If there's a segment prefix for this
1898 * instruction, we'll need to check permissions
1899 * and bounds on the given selector, and adjust
1900 * the address accordingly.
1901 */
1902 if (tp->ftt_segment != FASTTRAP_SEG_NONE &&
1903 fasttrap_do_seg(tp, regs, &addr) != 0) {
1904 fasttrap_sigsegv(p, uthread, addr);
1905 new_pc = pc;
1906 break;
1907 }
1908
1909 if (fasttrap_fuword64(addr, &value) == -1) {
1910 fasttrap_sigsegv(p, uthread, addr);
1911 new_pc = pc;
1912 break;
1913 }
1914 new_pc = value;
1915 } else {
1916 new_pc = addr;
1917 }
1918 }
1919
1920 /*
1921 * If this is a call instruction, we need to push the return
1922 * address onto the stack. If this fails, we send the process
1923 * a SIGSEGV and reset the pc to emulate what would happen if
1924 * this instruction weren't traced.
1925 */
1926 if (tp->ftt_type == FASTTRAP_T_CALL) {
1927 user_addr_t addr = regs64->isf.rsp - sizeof (uint64_t);
1928 int ret = fasttrap_suword64(addr, pc + tp->ftt_size);
1929
1930 if (ret == -1) {
1931 fasttrap_sigsegv(p, uthread, addr);
1932 new_pc = pc;
1933 break;
1934 }
1935
1936 regs64->isf.rsp = addr;
1937 }
1938 break;
1939
1940 case FASTTRAP_T_COMMON:
1941 {
1942 user_addr_t addr, write_addr;
1943 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22];
1944 uint_t i = 0;
1945
1946 /*
1947 * Generic Instruction Tracing
1948 * ---------------------------
1949 *
1950 * This is the layout of the scratch space in the user-land
1951 * thread structure for our generated instructions.
1952 *
1953 * 32-bit mode bytes
1954 * ------------------------ -----
1955 * a: <original instruction> <= 15
1956 * jmp <pc + tp->ftt_size> 5
1957 * b: <original instrction> <= 15
1958 * int T_DTRACE_RET 2
1959 * -----
1960 * <= 37
1961 *
1962 * 64-bit mode bytes
1963 * ------------------------ -----
1964 * a: <original instruction> <= 15
1965 * jmp 0(%rip) 6
1966 * <pc + tp->ftt_size> 8
1967 * b: <original instruction> <= 15
1968 * int T_DTRACE_RET 2
1969 * -----
1970 * <= 46
1971 *
1972 * The %pc is set to a, and curthread->t_dtrace_astpc is set
1973 * to b. If we encounter a signal on the way out of the
1974 * kernel, trap() will set %pc to curthread->t_dtrace_astpc
1975 * so that we execute the original instruction and re-enter
1976 * the kernel rather than redirecting to the next instruction.
1977 *
1978 * If there are return probes (so we know that we're going to
1979 * need to reenter the kernel after executing the original
1980 * instruction), the scratch space will just contain the
1981 * original instruction followed by an interrupt -- the same
1982 * data as at b.
1983 *
1984 * %rip-relative Addressing
1985 * ------------------------
1986 *
1987 * There's a further complication in 64-bit mode due to %rip-
1988 * relative addressing. While this is clearly a beneficial
1989 * architectural decision for position independent code, it's
1990 * hard not to see it as a personal attack against the pid
1991 * provider since before there was a relatively small set of
1992 * instructions to emulate; with %rip-relative addressing,
1993 * almost every instruction can potentially depend on the
1994 * address at which it's executed. Rather than emulating
1995 * the broad spectrum of instructions that can now be
1996 * position dependent, we emulate jumps and others as in
1997 * 32-bit mode, and take a different tack for instructions
1998 * using %rip-relative addressing.
1999 *
2000 * For every instruction that uses the ModRM byte, the
2001 * in-kernel disassembler reports its location. We use the
2002 * ModRM byte to identify that an instruction uses
2003 * %rip-relative addressing and to see what other registers
2004 * the instruction uses. To emulate those instructions,
2005 * we modify the instruction to be %rax-relative rather than
2006 * %rip-relative (or %rcx-relative if the instruction uses
2007 * %rax; or %r8- or %r9-relative if the REX.B is present so
2008 * we don't have to rewrite the REX prefix). We then load
2009 * the value that %rip would have been into the scratch
2010 * register and generate an instruction to reset the scratch
2011 * register back to its original value. The instruction
2012 * sequence looks like this:
2013 *
2014 * 64-mode %rip-relative bytes
2015 * ------------------------ -----
2016 * a: <modified instruction> <= 15
2017 * movq $<value>, %<scratch> 6
2018 * jmp 0(%rip) 6
2019 * <pc + tp->ftt_size> 8
2020 * b: <modified instruction> <= 15
2021 * int T_DTRACE_RET 2
2022 * -----
2023 * 52
2024 *
2025 * We set curthread->t_dtrace_regv so that upon receiving
2026 * a signal we can reset the value of the scratch register.
2027 */
2028
2029 addr = uthread->t_dtrace_scratch->addr;
2030 write_addr = uthread->t_dtrace_scratch->write_addr;
2031
2032 if (addr == 0LL || write_addr == 0LL) {
2033 fasttrap_sigtrap(p, uthread, pc); // Should be killing target proc
2034 new_pc = pc;
2035 break;
2036 }
2037
2038 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE);
2039
2040 uthread->t_dtrace_scrpc = addr;
2041 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
2042 i += tp->ftt_size;
2043
2044 if (tp->ftt_ripmode != 0) {
2045 uint64_t* reg;
2046
2047 ASSERT(tp->ftt_ripmode &
2048 (FASTTRAP_RIP_1 | FASTTRAP_RIP_2));
2049
2050 /*
2051 * If this was a %rip-relative instruction, we change
2052 * it to be either a %rax- or %rcx-relative
2053 * instruction (depending on whether those registers
2054 * are used as another operand; or %r8- or %r9-
2055 * relative depending on the value of REX.B). We then
2056 * set that register and generate a movq instruction
2057 * to reset the value.
2058 */
2059 if (tp->ftt_ripmode & FASTTRAP_RIP_X)
2060 scratch[i++] = FASTTRAP_REX(1, 0, 0, 1);
2061 else
2062 scratch[i++] = FASTTRAP_REX(1, 0, 0, 0);
2063
2064 if (tp->ftt_ripmode & FASTTRAP_RIP_1)
2065 scratch[i++] = FASTTRAP_MOV_EAX;
2066 else
2067 scratch[i++] = FASTTRAP_MOV_ECX;
2068
2069 switch (tp->ftt_ripmode) {
2070 case FASTTRAP_RIP_1:
2071 reg = &regs64->rax;
2072 uthread->t_dtrace_reg = REG_RAX;
2073 break;
2074 case FASTTRAP_RIP_2:
2075 reg = &regs64->rcx;
2076 uthread->t_dtrace_reg = REG_RCX;
2077 break;
2078 case FASTTRAP_RIP_1 | FASTTRAP_RIP_X:
2079 reg = &regs64->r8;
2080 uthread->t_dtrace_reg = REG_R8;
2081 break;
2082 case FASTTRAP_RIP_2 | FASTTRAP_RIP_X:
2083 reg = &regs64->r9;
2084 uthread->t_dtrace_reg = REG_R9;
2085 break;
2086 default:
2087 reg = NULL;
2088 panic("unhandled ripmode in fasttrap_pid_probe64");
2089 }
2090
2091 /* LINTED - alignment */
2092 *(uint64_t *)&scratch[i] = *reg;
2093 uthread->t_dtrace_regv = *reg;
2094 *reg = pc + tp->ftt_size;
2095 i += sizeof (uint64_t);
2096 }
2097
2098 /*
2099 * Generate the branch instruction to what would have
2100 * normally been the subsequent instruction. In 32-bit mode,
2101 * this is just a relative branch; in 64-bit mode this is a
2102 * %rip-relative branch that loads the 64-bit pc value
2103 * immediately after the jmp instruction.
2104 */
2105 scratch[i++] = FASTTRAP_GROUP5_OP;
2106 scratch[i++] = FASTTRAP_MODRM(0, 4, 5);
2107 /* LINTED - alignment */
2108 *(uint32_t *)&scratch[i] = 0;
2109 i += sizeof (uint32_t);
2110 /* LINTED - alignment */
2111 *(uint64_t *)&scratch[i] = pc + tp->ftt_size;
2112 i += sizeof (uint64_t);
2113
2114 uthread->t_dtrace_astpc = addr + i;
2115 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
2116 i += tp->ftt_size;
2117 scratch[i++] = FASTTRAP_INT;
2118 scratch[i++] = T_DTRACE_RET;
2119
2120 ASSERT(i <= sizeof (scratch));
2121
2122 if (fasttrap_copyout(scratch, write_addr, i)) {
2123 fasttrap_sigtrap(p, uthread, pc);
2124 new_pc = pc;
2125 break;
2126 }
2127
2128 if (tp->ftt_retids != NULL) {
2129 uthread->t_dtrace_step = 1;
2130 uthread->t_dtrace_ret = 1;
2131 new_pc = uthread->t_dtrace_astpc;
2132 } else {
2133 new_pc = uthread->t_dtrace_scrpc;
2134 }
2135
2136 uthread->t_dtrace_pc = pc;
2137 uthread->t_dtrace_npc = pc + tp->ftt_size;
2138 uthread->t_dtrace_on = 1;
2139 break;
2140 }
2141
2142 default:
2143 panic("fasttrap: mishandled an instruction");
2144 }
2145
2146done:
2147 /*
2148 * APPLE NOTE:
2149 *
2150 * We're setting this earlier than Solaris does, to get a "correct"
2151 * ustack() output. In the Sun code, a() -> b() -> c() -> d() is
2152 * reported at: d, b, a. The new way gives c, b, a, which is closer
2153 * to correct, as the return instruction has already exectued.
2154 */
2155 regs64->isf.rip = new_pc;
2156
2157
2158 /*
2159 * If there were no return probes when we first found the tracepoint,
2160 * we should feel no obligation to honor any return probes that were
2161 * subsequently enabled -- they'll just have to wait until the next
2162 * time around.
2163 */
2164 if (tp->ftt_retids != NULL) {
2165 /*
2166 * We need to wait until the results of the instruction are
2167 * apparent before invoking any return probes. If this
2168 * instruction was emulated we can just call
2169 * fasttrap_return_common(); if it needs to be executed, we
2170 * need to wait until the user thread returns to the kernel.
2171 */
2172 if (tp->ftt_type != FASTTRAP_T_COMMON) {
2173 fasttrap_return_common(regs, pc, pid, new_pc);
2174 } else {
2175 ASSERT(uthread->t_dtrace_ret != 0);
2176 ASSERT(uthread->t_dtrace_pc == pc);
2177 ASSERT(uthread->t_dtrace_scrpc != 0);
2178 ASSERT(new_pc == uthread->t_dtrace_astpc);
2179 }
2180 }
2181
2182 return (0);
2183}
2184
2185int
2186fasttrap_pid_probe(x86_saved_state_t *regs)
2187{
2188 if (is_saved_state64(regs))
2189 return fasttrap_pid_probe64(regs);
2190
2191 return fasttrap_pid_probe32(regs);
2192}
2193
2194int
2195fasttrap_return_probe(x86_saved_state_t *regs)
2196{
2197 x86_saved_state64_t *regs64;
2198 x86_saved_state32_t *regs32;
2199 unsigned int p_model;
2200
2201 if (is_saved_state64(regs)) {
2202 regs64 = saved_state64(regs);
2203 regs32 = NULL;
2204 p_model = DATAMODEL_LP64;
2205 } else {
2206 regs64 = NULL;
2207 regs32 = saved_state32(regs);
2208 p_model = DATAMODEL_ILP32;
2209 }
2210
2211 proc_t *p = current_proc();
2212 uthread_t uthread = (uthread_t)get_bsdthread_info(current_thread());
2213 user_addr_t pc = uthread->t_dtrace_pc;
2214 user_addr_t npc = uthread->t_dtrace_npc;
2215
2216 uthread->t_dtrace_pc = 0;
2217 uthread->t_dtrace_npc = 0;
2218 uthread->t_dtrace_scrpc = 0;
2219 uthread->t_dtrace_astpc = 0;
2220
2221 /*
2222 * Treat a child created by a call to vfork(2) as if it were its
2223 * parent. We know that there's only one thread of control in such a
2224 * process: this one.
2225 */
2226 proc_list_lock();
2227 while (p->p_lflag & P_LINVFORK)
2228 p = p->p_pptr;
2229 proc_list_unlock();
2230
2231 /*
2232 * We set rp->r_pc to the address of the traced instruction so
2233 * that it appears to dtrace_probe() that we're on the original
2234 * instruction, and so that the user can't easily detect our
2235 * complex web of lies. dtrace_return_probe() (our caller)
2236 * will correctly set %pc after we return.
2237 */
2238 if (p_model == DATAMODEL_LP64)
2239 regs64->isf.rip = pc;
2240 else
2241 regs32->eip = pc;
2242
2243 fasttrap_return_common(regs, pc, p->p_pid, npc);
2244
2245 return (0);
2246}
2247
2248uint64_t
2249fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
2250 int aframes)
2251{
2252 pal_register_cache_state(current_thread(), VALID);
2253#pragma unused(arg, id, parg, aframes)
2254 return (fasttrap_anarg((x86_saved_state_t *)find_user_regs(current_thread()), 1, argno));
2255}
2256
2257uint64_t
2258fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
2259 int aframes)
2260{
2261 pal_register_cache_state(current_thread(), VALID);
2262#pragma unused(arg, id, parg, aframes)
2263 return (fasttrap_anarg((x86_saved_state_t *)find_user_regs(current_thread()), 0, argno));
2264}
2265
2266/*
2267 * APPLE NOTE: See comments by regmap array definition. We are cheating
2268 * when returning 32 bit registers.
2269 */
2270static user_addr_t
2271fasttrap_getreg(x86_saved_state_t *regs, uint_t reg)
2272{
2273 if (is_saved_state64(regs)) {
2274 x86_saved_state64_t *regs64 = saved_state64(regs);
2275
2276 switch (reg) {
2277 case REG_RAX: return regs64->rax;
2278 case REG_RCX: return regs64->rcx;
2279 case REG_RDX: return regs64->rdx;
2280 case REG_RBX: return regs64->rbx;
2281 case REG_RSP: return regs64->isf.rsp;
2282 case REG_RBP: return regs64->rbp;
2283 case REG_RSI: return regs64->rsi;
2284 case REG_RDI: return regs64->rdi;
2285 case REG_R8: return regs64->r8;
2286 case REG_R9: return regs64->r9;
2287 case REG_R10: return regs64->r10;
2288 case REG_R11: return regs64->r11;
2289 case REG_R12: return regs64->r12;
2290 case REG_R13: return regs64->r13;
2291 case REG_R14: return regs64->r14;
2292 case REG_R15: return regs64->r15;
2293 case REG_TRAPNO: return regs64->isf.trapno;
2294 case REG_ERR: return regs64->isf.err;
2295 case REG_RIP: return regs64->isf.rip;
2296 case REG_CS: return regs64->isf.cs;
2297 case REG_RFL: return regs64->isf.rflags;
2298 case REG_SS: return regs64->isf.ss;
2299 case REG_FS: return regs64->fs;
2300 case REG_GS: return regs64->gs;
2301 case REG_ES:
2302 case REG_DS:
2303 case REG_FSBASE:
2304 case REG_GSBASE:
2305 // Important to distinguish these requests (which should be legal) from other values.
2306 panic("dtrace: unimplemented x86_64 getreg()");
2307 }
2308
2309 panic("dtrace: unhandled x86_64 getreg() constant");
2310 } else {
2311 x86_saved_state32_t *regs32 = saved_state32(regs);
2312
2313 switch (reg) {
2314 case REG_RAX: return regs32->eax;
2315 case REG_RCX: return regs32->ecx;
2316 case REG_RDX: return regs32->edx;
2317 case REG_RBX: return regs32->ebx;
2318 case REG_RSP: return regs32->uesp;
2319 case REG_RBP: return regs32->ebp;
2320 case REG_RSI: return regs32->esi;
2321 case REG_RDI: return regs32->edi;
2322 }
2323
2324 panic("dtrace: unhandled i386 getreg() constant");
2325 }
2326
2327 return 0;
2328}
2329