1 | /* Constants and data structures for x86 CPU features. |
2 | This file is part of the GNU C Library. |
3 | Copyright (C) 2008-2023 Free Software Foundation, Inc. |
4 | |
5 | The GNU C Library is free software; you can redistribute it and/or |
6 | modify it under the terms of the GNU Lesser General Public |
7 | License as published by the Free Software Foundation; either |
8 | version 2.1 of the License, or (at your option) any later version. |
9 | |
10 | The GNU C Library is distributed in the hope that it will be useful, |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
13 | Lesser General Public License for more details. |
14 | |
15 | You should have received a copy of the GNU Lesser General Public |
16 | License along with the GNU C Library; if not, see |
17 | <https://www.gnu.org/licenses/>. */ |
18 | |
19 | #ifndef _SYS_PLATFORM_X86_H |
20 | # error "Never include <bits/platform/x86.h> directly; use <sys/platform/x86.h> instead." |
21 | #endif |
22 | |
23 | enum |
24 | { |
25 | CPUID_INDEX_1 = 0, |
26 | CPUID_INDEX_7, |
27 | CPUID_INDEX_80000001, |
28 | CPUID_INDEX_D_ECX_1, |
29 | CPUID_INDEX_80000007, |
30 | CPUID_INDEX_80000008, |
31 | CPUID_INDEX_7_ECX_1, |
32 | CPUID_INDEX_19, |
33 | CPUID_INDEX_14_ECX_0 |
34 | }; |
35 | |
36 | struct cpuid_feature |
37 | { |
38 | unsigned int cpuid_array[4]; |
39 | unsigned int active_array[4]; |
40 | }; |
41 | |
42 | enum cpuid_register_index |
43 | { |
44 | cpuid_register_index_eax = 0, |
45 | cpuid_register_index_ebx, |
46 | cpuid_register_index_ecx, |
47 | cpuid_register_index_edx |
48 | }; |
49 | |
50 | /* CPU features. */ |
51 | |
52 | enum |
53 | { |
54 | x86_cpu_index_1_ecx |
55 | = (CPUID_INDEX_1 * 8 * 4 * sizeof (unsigned int) |
56 | + cpuid_register_index_ecx * 8 * sizeof (unsigned int)), |
57 | |
58 | x86_cpu_SSE3 = x86_cpu_index_1_ecx, |
59 | x86_cpu_PCLMULQDQ = x86_cpu_index_1_ecx + 1, |
60 | x86_cpu_DTES64 = x86_cpu_index_1_ecx + 2, |
61 | x86_cpu_MONITOR = x86_cpu_index_1_ecx + 3, |
62 | x86_cpu_DS_CPL = x86_cpu_index_1_ecx + 4, |
63 | x86_cpu_VMX = x86_cpu_index_1_ecx + 5, |
64 | x86_cpu_SMX = x86_cpu_index_1_ecx + 6, |
65 | x86_cpu_EIST = x86_cpu_index_1_ecx + 7, |
66 | x86_cpu_TM2 = x86_cpu_index_1_ecx + 8, |
67 | x86_cpu_SSSE3 = x86_cpu_index_1_ecx + 9, |
68 | x86_cpu_CNXT_ID = x86_cpu_index_1_ecx + 10, |
69 | x86_cpu_SDBG = x86_cpu_index_1_ecx + 11, |
70 | x86_cpu_FMA = x86_cpu_index_1_ecx + 12, |
71 | x86_cpu_CMPXCHG16B = x86_cpu_index_1_ecx + 13, |
72 | x86_cpu_XTPRUPDCTRL = x86_cpu_index_1_ecx + 14, |
73 | x86_cpu_PDCM = x86_cpu_index_1_ecx + 15, |
74 | x86_cpu_INDEX_1_ECX_16 = x86_cpu_index_1_ecx + 16, |
75 | x86_cpu_PCID = x86_cpu_index_1_ecx + 17, |
76 | x86_cpu_DCA = x86_cpu_index_1_ecx + 18, |
77 | x86_cpu_SSE4_1 = x86_cpu_index_1_ecx + 19, |
78 | x86_cpu_SSE4_2 = x86_cpu_index_1_ecx + 20, |
79 | x86_cpu_X2APIC = x86_cpu_index_1_ecx + 21, |
80 | x86_cpu_MOVBE = x86_cpu_index_1_ecx + 22, |
81 | x86_cpu_POPCNT = x86_cpu_index_1_ecx + 23, |
82 | x86_cpu_TSC_DEADLINE = x86_cpu_index_1_ecx + 24, |
83 | x86_cpu_AES = x86_cpu_index_1_ecx + 25, |
84 | x86_cpu_XSAVE = x86_cpu_index_1_ecx + 26, |
85 | x86_cpu_OSXSAVE = x86_cpu_index_1_ecx + 27, |
86 | x86_cpu_AVX = x86_cpu_index_1_ecx + 28, |
87 | x86_cpu_F16C = x86_cpu_index_1_ecx + 29, |
88 | x86_cpu_RDRAND = x86_cpu_index_1_ecx + 30, |
89 | x86_cpu_INDEX_1_ECX_31 = x86_cpu_index_1_ecx + 31, |
90 | |
91 | x86_cpu_index_1_edx |
92 | = (CPUID_INDEX_1 * 8 * 4 * sizeof (unsigned int) |
93 | + cpuid_register_index_edx * 8 * sizeof (unsigned int)), |
94 | |
95 | x86_cpu_FPU = x86_cpu_index_1_edx, |
96 | x86_cpu_VME = x86_cpu_index_1_edx + 1, |
97 | x86_cpu_DE = x86_cpu_index_1_edx + 2, |
98 | x86_cpu_PSE = x86_cpu_index_1_edx + 3, |
99 | x86_cpu_TSC = x86_cpu_index_1_edx + 4, |
100 | x86_cpu_MSR = x86_cpu_index_1_edx + 5, |
101 | x86_cpu_PAE = x86_cpu_index_1_edx + 6, |
102 | x86_cpu_MCE = x86_cpu_index_1_edx + 7, |
103 | x86_cpu_CX8 = x86_cpu_index_1_edx + 8, |
104 | x86_cpu_APIC = x86_cpu_index_1_edx + 9, |
105 | x86_cpu_INDEX_1_EDX_10 = x86_cpu_index_1_edx + 10, |
106 | x86_cpu_SEP = x86_cpu_index_1_edx + 11, |
107 | x86_cpu_MTRR = x86_cpu_index_1_edx + 12, |
108 | x86_cpu_PGE = x86_cpu_index_1_edx + 13, |
109 | x86_cpu_MCA = x86_cpu_index_1_edx + 14, |
110 | x86_cpu_CMOV = x86_cpu_index_1_edx + 15, |
111 | x86_cpu_PAT = x86_cpu_index_1_edx + 16, |
112 | x86_cpu_PSE_36 = x86_cpu_index_1_edx + 17, |
113 | x86_cpu_PSN = x86_cpu_index_1_edx + 18, |
114 | x86_cpu_CLFSH = x86_cpu_index_1_edx + 19, |
115 | x86_cpu_INDEX_1_EDX_20 = x86_cpu_index_1_edx + 20, |
116 | x86_cpu_DS = x86_cpu_index_1_edx + 21, |
117 | x86_cpu_ACPI = x86_cpu_index_1_edx + 22, |
118 | x86_cpu_MMX = x86_cpu_index_1_edx + 23, |
119 | x86_cpu_FXSR = x86_cpu_index_1_edx + 24, |
120 | x86_cpu_SSE = x86_cpu_index_1_edx + 25, |
121 | x86_cpu_SSE2 = x86_cpu_index_1_edx + 26, |
122 | x86_cpu_SS = x86_cpu_index_1_edx + 27, |
123 | x86_cpu_HTT = x86_cpu_index_1_edx + 28, |
124 | x86_cpu_TM = x86_cpu_index_1_edx + 29, |
125 | x86_cpu_INDEX_1_EDX_30 = x86_cpu_index_1_edx + 30, |
126 | x86_cpu_PBE = x86_cpu_index_1_edx + 31, |
127 | |
128 | x86_cpu_index_7_ebx |
129 | = (CPUID_INDEX_7 * 8 * 4 * sizeof (unsigned int) |
130 | + cpuid_register_index_ebx * 8 * sizeof (unsigned int)), |
131 | |
132 | x86_cpu_FSGSBASE = x86_cpu_index_7_ebx, |
133 | x86_cpu_TSC_ADJUST = x86_cpu_index_7_ebx + 1, |
134 | x86_cpu_SGX = x86_cpu_index_7_ebx + 2, |
135 | x86_cpu_BMI1 = x86_cpu_index_7_ebx + 3, |
136 | x86_cpu_HLE = x86_cpu_index_7_ebx + 4, |
137 | x86_cpu_AVX2 = x86_cpu_index_7_ebx + 5, |
138 | x86_cpu_INDEX_7_EBX_6 = x86_cpu_index_7_ebx + 6, |
139 | x86_cpu_SMEP = x86_cpu_index_7_ebx + 7, |
140 | x86_cpu_BMI2 = x86_cpu_index_7_ebx + 8, |
141 | x86_cpu_ERMS = x86_cpu_index_7_ebx + 9, |
142 | x86_cpu_INVPCID = x86_cpu_index_7_ebx + 10, |
143 | x86_cpu_RTM = x86_cpu_index_7_ebx + 11, |
144 | x86_cpu_RDT_M = x86_cpu_index_7_ebx + 12, |
145 | x86_cpu_DEPR_FPU_CS_DS = x86_cpu_index_7_ebx + 13, |
146 | x86_cpu_MPX = x86_cpu_index_7_ebx + 14, |
147 | x86_cpu_RDT_A = x86_cpu_index_7_ebx + 15, |
148 | x86_cpu_AVX512F = x86_cpu_index_7_ebx + 16, |
149 | x86_cpu_AVX512DQ = x86_cpu_index_7_ebx + 17, |
150 | x86_cpu_RDSEED = x86_cpu_index_7_ebx + 18, |
151 | x86_cpu_ADX = x86_cpu_index_7_ebx + 19, |
152 | x86_cpu_SMAP = x86_cpu_index_7_ebx + 20, |
153 | x86_cpu_AVX512_IFMA = x86_cpu_index_7_ebx + 21, |
154 | x86_cpu_INDEX_7_EBX_22 = x86_cpu_index_7_ebx + 22, |
155 | x86_cpu_CLFLUSHOPT = x86_cpu_index_7_ebx + 23, |
156 | x86_cpu_CLWB = x86_cpu_index_7_ebx + 24, |
157 | x86_cpu_TRACE = x86_cpu_index_7_ebx + 25, |
158 | x86_cpu_AVX512PF = x86_cpu_index_7_ebx + 26, |
159 | x86_cpu_AVX512ER = x86_cpu_index_7_ebx + 27, |
160 | x86_cpu_AVX512CD = x86_cpu_index_7_ebx + 28, |
161 | x86_cpu_SHA = x86_cpu_index_7_ebx + 29, |
162 | x86_cpu_AVX512BW = x86_cpu_index_7_ebx + 30, |
163 | x86_cpu_AVX512VL = x86_cpu_index_7_ebx + 31, |
164 | |
165 | x86_cpu_index_7_ecx |
166 | = (CPUID_INDEX_7 * 8 * 4 * sizeof (unsigned int) |
167 | + cpuid_register_index_ecx * 8 * sizeof (unsigned int)), |
168 | |
169 | x86_cpu_PREFETCHWT1 = x86_cpu_index_7_ecx, |
170 | x86_cpu_AVX512_VBMI = x86_cpu_index_7_ecx + 1, |
171 | x86_cpu_UMIP = x86_cpu_index_7_ecx + 2, |
172 | x86_cpu_PKU = x86_cpu_index_7_ecx + 3, |
173 | x86_cpu_OSPKE = x86_cpu_index_7_ecx + 4, |
174 | x86_cpu_WAITPKG = x86_cpu_index_7_ecx + 5, |
175 | x86_cpu_AVX512_VBMI2 = x86_cpu_index_7_ecx + 6, |
176 | x86_cpu_SHSTK = x86_cpu_index_7_ecx + 7, |
177 | x86_cpu_GFNI = x86_cpu_index_7_ecx + 8, |
178 | x86_cpu_VAES = x86_cpu_index_7_ecx + 9, |
179 | x86_cpu_VPCLMULQDQ = x86_cpu_index_7_ecx + 10, |
180 | x86_cpu_AVX512_VNNI = x86_cpu_index_7_ecx + 11, |
181 | x86_cpu_AVX512_BITALG = x86_cpu_index_7_ecx + 12, |
182 | x86_cpu_INDEX_7_ECX_13 = x86_cpu_index_7_ecx + 13, |
183 | x86_cpu_AVX512_VPOPCNTDQ = x86_cpu_index_7_ecx + 14, |
184 | x86_cpu_INDEX_7_ECX_1 = x86_cpu_index_7_ecx + 15, |
185 | x86_cpu_INDEX_7_ECX_16 = x86_cpu_index_7_ecx + 16, |
186 | /* Note: Bits 17-21: The value of MAWAU used by the BNDLDX and BNDSTX |
187 | instructions in 64-bit mode. */ |
188 | x86_cpu_RDPID = x86_cpu_index_7_ecx + 22, |
189 | x86_cpu_KL = x86_cpu_index_7_ecx + 23, |
190 | x86_cpu_INDEX_7_ECX_24 = x86_cpu_index_7_ecx + 24, |
191 | x86_cpu_CLDEMOTE = x86_cpu_index_7_ecx + 25, |
192 | x86_cpu_INDEX_7_ECX_26 = x86_cpu_index_7_ecx + 26, |
193 | x86_cpu_MOVDIRI = x86_cpu_index_7_ecx + 27, |
194 | x86_cpu_MOVDIR64B = x86_cpu_index_7_ecx + 28, |
195 | x86_cpu_ENQCMD = x86_cpu_index_7_ecx + 29, |
196 | x86_cpu_SGX_LC = x86_cpu_index_7_ecx + 30, |
197 | x86_cpu_PKS = x86_cpu_index_7_ecx + 31, |
198 | |
199 | x86_cpu_index_7_edx |
200 | = (CPUID_INDEX_7 * 8 * 4 * sizeof (unsigned int) |
201 | + cpuid_register_index_edx * 8 * sizeof (unsigned int)), |
202 | |
203 | x86_cpu_INDEX_7_EDX_0 = x86_cpu_index_7_edx, |
204 | x86_cpu_INDEX_7_EDX_1 = x86_cpu_index_7_edx + 1, |
205 | x86_cpu_AVX512_4VNNIW = x86_cpu_index_7_edx + 2, |
206 | x86_cpu_AVX512_4FMAPS = x86_cpu_index_7_edx + 3, |
207 | x86_cpu_FSRM = x86_cpu_index_7_edx + 4, |
208 | x86_cpu_UINTR = x86_cpu_index_7_edx + 5, |
209 | x86_cpu_INDEX_7_EDX_6 = x86_cpu_index_7_edx + 6, |
210 | x86_cpu_INDEX_7_EDX_7 = x86_cpu_index_7_edx + 7, |
211 | x86_cpu_AVX512_VP2INTERSECT = x86_cpu_index_7_edx + 8, |
212 | x86_cpu_INDEX_7_EDX_9 = x86_cpu_index_7_edx + 9, |
213 | x86_cpu_MD_CLEAR = x86_cpu_index_7_edx + 10, |
214 | x86_cpu_RTM_ALWAYS_ABORT = x86_cpu_index_7_edx + 11, |
215 | x86_cpu_INDEX_7_EDX_12 = x86_cpu_index_7_edx + 12, |
216 | x86_cpu_INDEX_7_EDX_13 = x86_cpu_index_7_edx + 13, |
217 | x86_cpu_SERIALIZE = x86_cpu_index_7_edx + 14, |
218 | x86_cpu_HYBRID = x86_cpu_index_7_edx + 15, |
219 | x86_cpu_TSXLDTRK = x86_cpu_index_7_edx + 16, |
220 | x86_cpu_INDEX_7_EDX_17 = x86_cpu_index_7_edx + 17, |
221 | x86_cpu_PCONFIG = x86_cpu_index_7_edx + 18, |
222 | x86_cpu_INDEX_7_EDX_19 = x86_cpu_index_7_edx + 19, |
223 | x86_cpu_IBT = x86_cpu_index_7_edx + 20, |
224 | x86_cpu_INDEX_7_EDX_21 = x86_cpu_index_7_edx + 21, |
225 | x86_cpu_AMX_BF16 = x86_cpu_index_7_edx + 22, |
226 | x86_cpu_AVX512_FP16 = x86_cpu_index_7_edx + 23, |
227 | x86_cpu_AMX_TILE = x86_cpu_index_7_edx + 24, |
228 | x86_cpu_AMX_INT8 = x86_cpu_index_7_edx + 25, |
229 | x86_cpu_IBRS_IBPB = x86_cpu_index_7_edx + 26, |
230 | x86_cpu_STIBP = x86_cpu_index_7_edx + 27, |
231 | x86_cpu_L1D_FLUSH = x86_cpu_index_7_edx + 28, |
232 | x86_cpu_ARCH_CAPABILITIES = x86_cpu_index_7_edx + 29, |
233 | x86_cpu_CORE_CAPABILITIES = x86_cpu_index_7_edx + 30, |
234 | x86_cpu_SSBD = x86_cpu_index_7_edx + 31, |
235 | |
236 | x86_cpu_index_80000001_ecx |
237 | = (CPUID_INDEX_80000001 * 8 * 4 * sizeof (unsigned int) |
238 | + cpuid_register_index_ecx * 8 * sizeof (unsigned int)), |
239 | |
240 | x86_cpu_LAHF64_SAHF64 = x86_cpu_index_80000001_ecx, |
241 | x86_cpu_SVM = x86_cpu_index_80000001_ecx + 2, |
242 | x86_cpu_LZCNT = x86_cpu_index_80000001_ecx + 5, |
243 | x86_cpu_SSE4A = x86_cpu_index_80000001_ecx + 6, |
244 | x86_cpu_PREFETCHW = x86_cpu_index_80000001_ecx + 8, |
245 | x86_cpu_XOP = x86_cpu_index_80000001_ecx + 11, |
246 | x86_cpu_LWP = x86_cpu_index_80000001_ecx + 15, |
247 | x86_cpu_FMA4 = x86_cpu_index_80000001_ecx + 16, |
248 | x86_cpu_TBM = x86_cpu_index_80000001_ecx + 21, |
249 | |
250 | x86_cpu_index_80000001_edx |
251 | = (CPUID_INDEX_80000001 * 8 * 4 * sizeof (unsigned int) |
252 | + cpuid_register_index_edx * 8 * sizeof (unsigned int)), |
253 | |
254 | x86_cpu_SYSCALL_SYSRET = x86_cpu_index_80000001_edx + 11, |
255 | x86_cpu_NX = x86_cpu_index_80000001_edx + 20, |
256 | x86_cpu_PAGE1GB = x86_cpu_index_80000001_edx + 26, |
257 | x86_cpu_RDTSCP = x86_cpu_index_80000001_edx + 27, |
258 | x86_cpu_LM = x86_cpu_index_80000001_edx + 29, |
259 | |
260 | x86_cpu_index_d_ecx_1_eax |
261 | = (CPUID_INDEX_D_ECX_1 * 8 * 4 * sizeof (unsigned int) |
262 | + cpuid_register_index_eax * 8 * sizeof (unsigned int)), |
263 | |
264 | x86_cpu_XSAVEOPT = x86_cpu_index_d_ecx_1_eax, |
265 | x86_cpu_XSAVEC = x86_cpu_index_d_ecx_1_eax + 1, |
266 | x86_cpu_XGETBV_ECX_1 = x86_cpu_index_d_ecx_1_eax + 2, |
267 | x86_cpu_XSAVES = x86_cpu_index_d_ecx_1_eax + 3, |
268 | x86_cpu_XFD = x86_cpu_index_d_ecx_1_eax + 4, |
269 | |
270 | x86_cpu_index_80000007_edx |
271 | = (CPUID_INDEX_80000007 * 8 * 4 * sizeof (unsigned int) |
272 | + cpuid_register_index_edx * 8 * sizeof (unsigned int)), |
273 | |
274 | x86_cpu_INVARIANT_TSC = x86_cpu_index_80000007_edx + 8, |
275 | |
276 | x86_cpu_index_80000008_ebx |
277 | = (CPUID_INDEX_80000008 * 8 * 4 * sizeof (unsigned int) |
278 | + cpuid_register_index_ebx * 8 * sizeof (unsigned int)), |
279 | |
280 | x86_cpu_WBNOINVD = x86_cpu_index_80000008_ebx + 9, |
281 | x86_cpu_AMD_IBPB = x86_cpu_index_80000008_ebx + 12, |
282 | x86_cpu_AMD_IBRS = x86_cpu_index_80000008_ebx + 14, |
283 | x86_cpu_AMD_STIBP = x86_cpu_index_80000008_ebx + 15, |
284 | x86_cpu_AMD_SSBD = x86_cpu_index_80000008_ebx + 24, |
285 | x86_cpu_AMD_VIRT_SSBD = x86_cpu_index_80000008_ebx + 25, |
286 | |
287 | x86_cpu_index_7_ecx_1_eax |
288 | = (CPUID_INDEX_7_ECX_1 * 8 * 4 * sizeof (unsigned int) |
289 | + cpuid_register_index_eax * 8 * sizeof (unsigned int)), |
290 | |
291 | x86_cpu_AVX_VNNI = x86_cpu_index_7_ecx_1_eax + 4, |
292 | x86_cpu_AVX512_BF16 = x86_cpu_index_7_ecx_1_eax + 5, |
293 | x86_cpu_FZLRM = x86_cpu_index_7_ecx_1_eax + 10, |
294 | x86_cpu_FSRS = x86_cpu_index_7_ecx_1_eax + 11, |
295 | x86_cpu_FSRCS = x86_cpu_index_7_ecx_1_eax + 12, |
296 | x86_cpu_HRESET = x86_cpu_index_7_ecx_1_eax + 22, |
297 | x86_cpu_LAM = x86_cpu_index_7_ecx_1_eax + 26, |
298 | |
299 | x86_cpu_index_19_ebx |
300 | = (CPUID_INDEX_19 * 8 * 4 * sizeof (unsigned int) |
301 | + cpuid_register_index_ebx * 8 * sizeof (unsigned int)), |
302 | |
303 | x86_cpu_AESKLE = x86_cpu_index_19_ebx, |
304 | x86_cpu_WIDE_KL = x86_cpu_index_19_ebx + 2, |
305 | |
306 | x86_cpu_index_14_ecx_0_ebx |
307 | = (CPUID_INDEX_14_ECX_0 * 8 * 4 * sizeof (unsigned int) |
308 | + cpuid_register_index_ebx * 8 * sizeof (unsigned int)), |
309 | |
310 | x86_cpu_PTWRITE = x86_cpu_index_14_ecx_0_ebx + 4 |
311 | }; |
312 | |