1/*
2 * Copyright (c) 2000-2010 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
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25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28
29#ifndef _PMAP_PCID_
30#define _PMAP_PCID_ 1
31#if defined(__x86_64__)
32void pmap_pcid_initialize(pmap_t);
33void pmap_pcid_initialize_kernel(pmap_t);
34pcid_t pmap_pcid_allocate_pcid(int);
35void pmap_pcid_deallocate_pcid(int, pmap_t);
36void pmap_destroy_pcid_sync_action(void *);
37void pmap_destroy_pcid_sync(pmap_t);
38void pmap_pcid_lazy_flush(pmap_t);
39void pmap_pcid_activate(pmap_t, int, boolean_t, boolean_t);
40pcid_t pcid_for_pmap_cpu_tuple(pmap_t, thread_t, int);
41
42#define PMAP_INVALID ((pmap_t)0xDEAD7347)
43#define PMAP_PCID_INVALID_PCID (0xDEAD)
44#define PMAP_PCID_MAX_REFCOUNT (0xF0)
45#define PMAP_PCID_MIN_PCID (1)
46
47extern uint32_t pmap_pcid_ncpus;
48
49static inline void
50tlb_flush_global(void) {
51 uintptr_t cr4 = get_cr4();
52 pmap_assert(ml_get_interrupts_enabled() == FALSE || get_preemption_level() !=0);
53 pmap_assert2(((cr4 & CR4_PGE) || ml_at_interrupt_context()), "CR4: 0x%lx", cr4);
54 /*
55 * We are, unfortunately, forced to rely on this expensive
56 * read-modify-write-write scheme due to the inadequate
57 * TLB invalidation ISA. The read is necessary as
58 * the kernel does not "own" the contents of CR4, the VMX
59 * feature in particular. It may be possible to
60 * avoid a global flush and instead track a generation
61 * count of kernel invalidations, but that scheme
62 * has its disadvantages as well.
63 */
64 if (cr4 & CR4_PGE) {
65 set_cr4(cr4 & ~CR4_PGE);
66 set_cr4(cr4 | CR4_PGE);
67 } else {
68 set_cr3_raw(get_cr3_raw());
69 }
70 return;
71}
72
73static inline void pmap_pcid_invalidate_all_cpus(pmap_t tpmap) {
74 unsigned i;
75
76 pmap_assert((sizeof(tpmap->pmap_pcid_coherency_vector) >= real_ncpus) && (!(sizeof(tpmap->pmap_pcid_coherency_vector) & 7)));
77
78 for (i = 0; i < real_ncpus; i+=8) {
79 *(uint64_t *)(uintptr_t)&tpmap->pmap_pcid_coherency_vector[i] = (~0ULL);
80 }
81}
82
83static inline void pmap_pcid_validate_current(void) {
84 int ccpu = cpu_number();
85 volatile uint8_t *cptr = cpu_datap(ccpu)->cpu_pmap_pcid_coherentp;
86#ifdef PMAP_MODULE
87 pmap_assert(cptr == &(current_thread()->map->pmap->pmap_pcid_coherency_vector[ccpu]));
88#endif
89 if (cptr) {
90 *cptr = 0;
91 }
92}
93
94static inline void pmap_pcid_invalidate_cpu(pmap_t tpmap, int ccpu) {
95 tpmap->pmap_pcid_coherency_vector[ccpu] = 0xFF;
96}
97
98static inline void pmap_pcid_validate_cpu(pmap_t tpmap, int ccpu) {
99 tpmap->pmap_pcid_coherency_vector[ccpu] = 0;
100}
101#endif /* x86_64 */
102#endif
103