1/*
2 * IDENTIFICATION:
3 * stub generated Tue Apr 9 11:33:41 2019
4 * with a MiG generated by bootstrap_cmds-96.20.2.200.4
5 * OPTIONS:
6 * KernelServer
7 */
8
9/* Module mach_vm */
10
11#define __MIG_check__Request__mach_vm_subsystem__ 1
12
13#include "mach_vm_server.h"
14
15#ifndef mig_internal
16#define mig_internal static __inline__
17#endif /* mig_internal */
18
19#ifndef mig_external
20#define mig_external
21#endif /* mig_external */
22
23#if !defined(__MigTypeCheck) && defined(TypeCheck)
24#define __MigTypeCheck TypeCheck /* Legacy setting */
25#endif /* !defined(__MigTypeCheck) */
26
27#if !defined(__MigKernelSpecificCode) && defined(_MIG_KERNEL_SPECIFIC_CODE_)
28#define __MigKernelSpecificCode _MIG_KERNEL_SPECIFIC_CODE_ /* Legacy setting */
29#endif /* !defined(__MigKernelSpecificCode) */
30
31#ifndef LimitCheck
32#define LimitCheck 0
33#endif /* LimitCheck */
34
35#ifndef min
36#define min(a,b) ( ((a) < (b))? (a): (b) )
37#endif /* min */
38
39#if !defined(_WALIGN_)
40#define _WALIGN_(x) (((x) + 3) & ~3)
41#endif /* !defined(_WALIGN_) */
42
43#if !defined(_WALIGNSZ_)
44#define _WALIGNSZ_(x) _WALIGN_(sizeof(x))
45#endif /* !defined(_WALIGNSZ_) */
46
47#ifndef UseStaticTemplates
48#define UseStaticTemplates 0
49#endif /* UseStaticTemplates */
50
51#ifndef __DeclareRcvRpc
52#define __DeclareRcvRpc(_NUM_, _NAME_)
53#endif /* __DeclareRcvRpc */
54
55#ifndef __BeforeRcvRpc
56#define __BeforeRcvRpc(_NUM_, _NAME_)
57#endif /* __BeforeRcvRpc */
58
59#ifndef __AfterRcvRpc
60#define __AfterRcvRpc(_NUM_, _NAME_)
61#endif /* __AfterRcvRpc */
62
63#ifndef __DeclareRcvSimple
64#define __DeclareRcvSimple(_NUM_, _NAME_)
65#endif /* __DeclareRcvSimple */
66
67#ifndef __BeforeRcvSimple
68#define __BeforeRcvSimple(_NUM_, _NAME_)
69#endif /* __BeforeRcvSimple */
70
71#ifndef __AfterRcvSimple
72#define __AfterRcvSimple(_NUM_, _NAME_)
73#endif /* __AfterRcvSimple */
74
75#define novalue void
76
77#if __MigKernelSpecificCode
78#define msgh_request_port msgh_remote_port
79#define MACH_MSGH_BITS_REQUEST(bits) MACH_MSGH_BITS_REMOTE(bits)
80#define msgh_reply_port msgh_local_port
81#define MACH_MSGH_BITS_REPLY(bits) MACH_MSGH_BITS_LOCAL(bits)
82#else
83#define msgh_request_port msgh_local_port
84#define MACH_MSGH_BITS_REQUEST(bits) MACH_MSGH_BITS_LOCAL(bits)
85#define msgh_reply_port msgh_remote_port
86#define MACH_MSGH_BITS_REPLY(bits) MACH_MSGH_BITS_REMOTE(bits)
87#endif /* __MigKernelSpecificCode */
88
89#define MIG_RETURN_ERROR(X, code) {\
90 ((mig_reply_error_t *)X)->RetCode = code;\
91 ((mig_reply_error_t *)X)->NDR = NDR_record;\
92 return;\
93 }
94
95/* Forward Declarations */
96
97
98mig_internal novalue _Xmach_vm_allocate_external
99 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
100
101mig_internal novalue _Xmach_vm_deallocate
102 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
103
104mig_internal novalue _Xmach_vm_protect
105 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
106
107mig_internal novalue _Xmach_vm_inherit
108 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
109
110mig_internal novalue _Xmach_vm_read
111 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
112
113mig_internal novalue _Xmach_vm_read_list
114 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
115
116mig_internal novalue _Xmach_vm_write
117 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
118
119mig_internal novalue _Xmach_vm_copy
120 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
121
122mig_internal novalue _Xmach_vm_read_overwrite
123 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
124
125mig_internal novalue _Xmach_vm_msync
126 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
127
128mig_internal novalue _Xmach_vm_behavior_set
129 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
130
131mig_internal novalue _Xmach_vm_map_external
132 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
133
134mig_internal novalue _Xmach_vm_machine_attribute
135 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
136
137mig_internal novalue _Xmach_vm_remap_external
138 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
139
140mig_internal novalue _Xmach_vm_page_query
141 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
142
143mig_internal novalue _Xmach_vm_region_recurse
144 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
145
146mig_internal novalue _Xmach_vm_region
147 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
148
149mig_internal novalue _X_mach_make_memory_entry
150 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
151
152mig_internal novalue _Xmach_vm_purgable_control
153 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
154
155mig_internal novalue _Xmach_vm_page_info
156 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
157
158mig_internal novalue _Xmach_vm_page_range_query
159 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP);
160
161
162#if ( __MigTypeCheck )
163#if __MIG_check__Request__mach_vm_subsystem__
164#if !defined(__MIG_check__Request__mach_vm_allocate_external_t__defined)
165#define __MIG_check__Request__mach_vm_allocate_external_t__defined
166
167mig_internal kern_return_t __MIG_check__Request__mach_vm_allocate_external_t(__attribute__((__unused__)) __Request__mach_vm_allocate_external_t *In0P)
168{
169
170 typedef __Request__mach_vm_allocate_external_t __Request;
171#if __MigTypeCheck
172 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
173 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
174 return MIG_BAD_ARGUMENTS;
175#endif /* __MigTypeCheck */
176
177 return MACH_MSG_SUCCESS;
178}
179#endif /* !defined(__MIG_check__Request__mach_vm_allocate_external_t__defined) */
180#endif /* __MIG_check__Request__mach_vm_subsystem__ */
181#endif /* ( __MigTypeCheck ) */
182
183
184/* Routine mach_vm_allocate_external */
185mig_internal novalue _Xmach_vm_allocate_external
186 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
187{
188
189#ifdef __MigPackStructs
190#pragma pack(4)
191#endif
192 typedef struct {
193 mach_msg_header_t Head;
194 NDR_record_t NDR;
195 mach_vm_address_t address;
196 mach_vm_size_t size;
197 int flags;
198 mach_msg_trailer_t trailer;
199 } Request __attribute__((unused));
200#ifdef __MigPackStructs
201#pragma pack()
202#endif
203 typedef __Request__mach_vm_allocate_external_t __Request;
204 typedef __Reply__mach_vm_allocate_external_t Reply __attribute__((unused));
205
206 /*
207 * typedef struct {
208 * mach_msg_header_t Head;
209 * NDR_record_t NDR;
210 * kern_return_t RetCode;
211 * } mig_reply_error_t;
212 */
213
214 Request *In0P = (Request *) InHeadP;
215 Reply *OutP = (Reply *) OutHeadP;
216#ifdef __MIG_check__Request__mach_vm_allocate_external_t__defined
217 kern_return_t check_result;
218#endif /* __MIG_check__Request__mach_vm_allocate_external_t__defined */
219
220#if __MigKernelSpecificCode
221#else
222#endif /* __MigKernelSpecificCode */
223 vm_map_t target;
224
225 __DeclareRcvRpc(4800, "mach_vm_allocate_external")
226 __BeforeRcvRpc(4800, "mach_vm_allocate_external")
227
228#if defined(__MIG_check__Request__mach_vm_allocate_external_t__defined)
229 check_result = __MIG_check__Request__mach_vm_allocate_external_t((__Request *)In0P);
230 if (check_result != MACH_MSG_SUCCESS)
231 { MIG_RETURN_ERROR(OutP, check_result); }
232#endif /* defined(__MIG_check__Request__mach_vm_allocate_external_t__defined) */
233
234 target = convert_port_entry_to_map(In0P->Head.msgh_request_port);
235
236 OutP->RetCode = mach_vm_allocate_external(target, &In0P->address, In0P->size, In0P->flags);
237 vm_map_deallocate(target);
238 if (OutP->RetCode != KERN_SUCCESS) {
239 MIG_RETURN_ERROR(OutP, OutP->RetCode);
240 }
241#if __MigKernelSpecificCode
242#endif /* __MigKernelSpecificCode */
243
244 OutP->NDR = NDR_record;
245
246
247 OutP->address = In0P->address;
248
249 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply));
250 __AfterRcvRpc(4800, "mach_vm_allocate_external")
251}
252
253#if ( __MigTypeCheck )
254#if __MIG_check__Request__mach_vm_subsystem__
255#if !defined(__MIG_check__Request__mach_vm_deallocate_t__defined)
256#define __MIG_check__Request__mach_vm_deallocate_t__defined
257
258mig_internal kern_return_t __MIG_check__Request__mach_vm_deallocate_t(__attribute__((__unused__)) __Request__mach_vm_deallocate_t *In0P)
259{
260
261 typedef __Request__mach_vm_deallocate_t __Request;
262#if __MigTypeCheck
263 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
264 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
265 return MIG_BAD_ARGUMENTS;
266#endif /* __MigTypeCheck */
267
268 return MACH_MSG_SUCCESS;
269}
270#endif /* !defined(__MIG_check__Request__mach_vm_deallocate_t__defined) */
271#endif /* __MIG_check__Request__mach_vm_subsystem__ */
272#endif /* ( __MigTypeCheck ) */
273
274
275/* Routine mach_vm_deallocate */
276mig_internal novalue _Xmach_vm_deallocate
277 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
278{
279
280#ifdef __MigPackStructs
281#pragma pack(4)
282#endif
283 typedef struct {
284 mach_msg_header_t Head;
285 NDR_record_t NDR;
286 mach_vm_address_t address;
287 mach_vm_size_t size;
288 mach_msg_trailer_t trailer;
289 } Request __attribute__((unused));
290#ifdef __MigPackStructs
291#pragma pack()
292#endif
293 typedef __Request__mach_vm_deallocate_t __Request;
294 typedef __Reply__mach_vm_deallocate_t Reply __attribute__((unused));
295
296 /*
297 * typedef struct {
298 * mach_msg_header_t Head;
299 * NDR_record_t NDR;
300 * kern_return_t RetCode;
301 * } mig_reply_error_t;
302 */
303
304 Request *In0P = (Request *) InHeadP;
305 Reply *OutP = (Reply *) OutHeadP;
306#ifdef __MIG_check__Request__mach_vm_deallocate_t__defined
307 kern_return_t check_result;
308#endif /* __MIG_check__Request__mach_vm_deallocate_t__defined */
309
310#if __MigKernelSpecificCode
311#else
312#endif /* __MigKernelSpecificCode */
313 vm_map_t target;
314
315 __DeclareRcvRpc(4801, "mach_vm_deallocate")
316 __BeforeRcvRpc(4801, "mach_vm_deallocate")
317
318#if defined(__MIG_check__Request__mach_vm_deallocate_t__defined)
319 check_result = __MIG_check__Request__mach_vm_deallocate_t((__Request *)In0P);
320 if (check_result != MACH_MSG_SUCCESS)
321 { MIG_RETURN_ERROR(OutP, check_result); }
322#endif /* defined(__MIG_check__Request__mach_vm_deallocate_t__defined) */
323
324 target = convert_port_entry_to_map(In0P->Head.msgh_request_port);
325
326 OutP->RetCode = mach_vm_deallocate(target, In0P->address, In0P->size);
327 vm_map_deallocate(target);
328#if __MigKernelSpecificCode
329#endif /* __MigKernelSpecificCode */
330
331 OutP->NDR = NDR_record;
332
333
334 __AfterRcvRpc(4801, "mach_vm_deallocate")
335}
336
337#if ( __MigTypeCheck )
338#if __MIG_check__Request__mach_vm_subsystem__
339#if !defined(__MIG_check__Request__mach_vm_protect_t__defined)
340#define __MIG_check__Request__mach_vm_protect_t__defined
341
342mig_internal kern_return_t __MIG_check__Request__mach_vm_protect_t(__attribute__((__unused__)) __Request__mach_vm_protect_t *In0P)
343{
344
345 typedef __Request__mach_vm_protect_t __Request;
346#if __MigTypeCheck
347 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
348 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
349 return MIG_BAD_ARGUMENTS;
350#endif /* __MigTypeCheck */
351
352 return MACH_MSG_SUCCESS;
353}
354#endif /* !defined(__MIG_check__Request__mach_vm_protect_t__defined) */
355#endif /* __MIG_check__Request__mach_vm_subsystem__ */
356#endif /* ( __MigTypeCheck ) */
357
358
359/* Routine mach_vm_protect */
360mig_internal novalue _Xmach_vm_protect
361 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
362{
363
364#ifdef __MigPackStructs
365#pragma pack(4)
366#endif
367 typedef struct {
368 mach_msg_header_t Head;
369 NDR_record_t NDR;
370 mach_vm_address_t address;
371 mach_vm_size_t size;
372 boolean_t set_maximum;
373 vm_prot_t new_protection;
374 mach_msg_trailer_t trailer;
375 } Request __attribute__((unused));
376#ifdef __MigPackStructs
377#pragma pack()
378#endif
379 typedef __Request__mach_vm_protect_t __Request;
380 typedef __Reply__mach_vm_protect_t Reply __attribute__((unused));
381
382 /*
383 * typedef struct {
384 * mach_msg_header_t Head;
385 * NDR_record_t NDR;
386 * kern_return_t RetCode;
387 * } mig_reply_error_t;
388 */
389
390 Request *In0P = (Request *) InHeadP;
391 Reply *OutP = (Reply *) OutHeadP;
392#ifdef __MIG_check__Request__mach_vm_protect_t__defined
393 kern_return_t check_result;
394#endif /* __MIG_check__Request__mach_vm_protect_t__defined */
395
396#if __MigKernelSpecificCode
397#else
398#endif /* __MigKernelSpecificCode */
399 vm_map_t target_task;
400
401 __DeclareRcvRpc(4802, "mach_vm_protect")
402 __BeforeRcvRpc(4802, "mach_vm_protect")
403
404#if defined(__MIG_check__Request__mach_vm_protect_t__defined)
405 check_result = __MIG_check__Request__mach_vm_protect_t((__Request *)In0P);
406 if (check_result != MACH_MSG_SUCCESS)
407 { MIG_RETURN_ERROR(OutP, check_result); }
408#endif /* defined(__MIG_check__Request__mach_vm_protect_t__defined) */
409
410 target_task = convert_port_entry_to_map(In0P->Head.msgh_request_port);
411
412 OutP->RetCode = mach_vm_protect(target_task, In0P->address, In0P->size, In0P->set_maximum, In0P->new_protection);
413 vm_map_deallocate(target_task);
414#if __MigKernelSpecificCode
415#endif /* __MigKernelSpecificCode */
416
417 OutP->NDR = NDR_record;
418
419
420 __AfterRcvRpc(4802, "mach_vm_protect")
421}
422
423#if ( __MigTypeCheck )
424#if __MIG_check__Request__mach_vm_subsystem__
425#if !defined(__MIG_check__Request__mach_vm_inherit_t__defined)
426#define __MIG_check__Request__mach_vm_inherit_t__defined
427
428mig_internal kern_return_t __MIG_check__Request__mach_vm_inherit_t(__attribute__((__unused__)) __Request__mach_vm_inherit_t *In0P)
429{
430
431 typedef __Request__mach_vm_inherit_t __Request;
432#if __MigTypeCheck
433 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
434 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
435 return MIG_BAD_ARGUMENTS;
436#endif /* __MigTypeCheck */
437
438 return MACH_MSG_SUCCESS;
439}
440#endif /* !defined(__MIG_check__Request__mach_vm_inherit_t__defined) */
441#endif /* __MIG_check__Request__mach_vm_subsystem__ */
442#endif /* ( __MigTypeCheck ) */
443
444
445/* Routine mach_vm_inherit */
446mig_internal novalue _Xmach_vm_inherit
447 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
448{
449
450#ifdef __MigPackStructs
451#pragma pack(4)
452#endif
453 typedef struct {
454 mach_msg_header_t Head;
455 NDR_record_t NDR;
456 mach_vm_address_t address;
457 mach_vm_size_t size;
458 vm_inherit_t new_inheritance;
459 mach_msg_trailer_t trailer;
460 } Request __attribute__((unused));
461#ifdef __MigPackStructs
462#pragma pack()
463#endif
464 typedef __Request__mach_vm_inherit_t __Request;
465 typedef __Reply__mach_vm_inherit_t Reply __attribute__((unused));
466
467 /*
468 * typedef struct {
469 * mach_msg_header_t Head;
470 * NDR_record_t NDR;
471 * kern_return_t RetCode;
472 * } mig_reply_error_t;
473 */
474
475 Request *In0P = (Request *) InHeadP;
476 Reply *OutP = (Reply *) OutHeadP;
477#ifdef __MIG_check__Request__mach_vm_inherit_t__defined
478 kern_return_t check_result;
479#endif /* __MIG_check__Request__mach_vm_inherit_t__defined */
480
481#if __MigKernelSpecificCode
482#else
483#endif /* __MigKernelSpecificCode */
484 vm_map_t target_task;
485
486 __DeclareRcvRpc(4803, "mach_vm_inherit")
487 __BeforeRcvRpc(4803, "mach_vm_inherit")
488
489#if defined(__MIG_check__Request__mach_vm_inherit_t__defined)
490 check_result = __MIG_check__Request__mach_vm_inherit_t((__Request *)In0P);
491 if (check_result != MACH_MSG_SUCCESS)
492 { MIG_RETURN_ERROR(OutP, check_result); }
493#endif /* defined(__MIG_check__Request__mach_vm_inherit_t__defined) */
494
495 target_task = convert_port_entry_to_map(In0P->Head.msgh_request_port);
496
497 OutP->RetCode = mach_vm_inherit(target_task, In0P->address, In0P->size, In0P->new_inheritance);
498 vm_map_deallocate(target_task);
499#if __MigKernelSpecificCode
500#endif /* __MigKernelSpecificCode */
501
502 OutP->NDR = NDR_record;
503
504
505 __AfterRcvRpc(4803, "mach_vm_inherit")
506}
507
508#if ( __MigTypeCheck )
509#if __MIG_check__Request__mach_vm_subsystem__
510#if !defined(__MIG_check__Request__mach_vm_read_t__defined)
511#define __MIG_check__Request__mach_vm_read_t__defined
512
513mig_internal kern_return_t __MIG_check__Request__mach_vm_read_t(__attribute__((__unused__)) __Request__mach_vm_read_t *In0P)
514{
515
516 typedef __Request__mach_vm_read_t __Request;
517#if __MigTypeCheck
518 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
519 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
520 return MIG_BAD_ARGUMENTS;
521#endif /* __MigTypeCheck */
522
523 return MACH_MSG_SUCCESS;
524}
525#endif /* !defined(__MIG_check__Request__mach_vm_read_t__defined) */
526#endif /* __MIG_check__Request__mach_vm_subsystem__ */
527#endif /* ( __MigTypeCheck ) */
528
529
530/* Routine mach_vm_read */
531mig_internal novalue _Xmach_vm_read
532 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
533{
534
535#ifdef __MigPackStructs
536#pragma pack(4)
537#endif
538 typedef struct {
539 mach_msg_header_t Head;
540 NDR_record_t NDR;
541 mach_vm_address_t address;
542 mach_vm_size_t size;
543 mach_msg_trailer_t trailer;
544 } Request __attribute__((unused));
545#ifdef __MigPackStructs
546#pragma pack()
547#endif
548 typedef __Request__mach_vm_read_t __Request;
549 typedef __Reply__mach_vm_read_t Reply __attribute__((unused));
550
551 /*
552 * typedef struct {
553 * mach_msg_header_t Head;
554 * NDR_record_t NDR;
555 * kern_return_t RetCode;
556 * } mig_reply_error_t;
557 */
558
559 Request *In0P = (Request *) InHeadP;
560 Reply *OutP = (Reply *) OutHeadP;
561#ifdef __MIG_check__Request__mach_vm_read_t__defined
562 kern_return_t check_result;
563#endif /* __MIG_check__Request__mach_vm_read_t__defined */
564
565#if __MigKernelSpecificCode
566#if UseStaticTemplates
567 const static mach_msg_ool_descriptor_t dataTemplate = {
568 /* addr = */ (void *)0,
569 /* size = */ 0,
570 /* deal = */ FALSE,
571 /* copy = */ MACH_MSG_VIRTUAL_COPY,
572 /* pad2 = */ 0,
573 /* type = */ MACH_MSG_OOL_DESCRIPTOR,
574 };
575#endif /* UseStaticTemplates */
576
577#else
578#if UseStaticTemplates
579 const static mach_msg_ool_descriptor_t dataTemplate = {
580 /* addr = */ (void *)0,
581 /* size = */ 0,
582 /* deal = */ FALSE,
583 /* copy = */ MACH_MSG_VIRTUAL_COPY,
584 /* pad2 = */ 0,
585 /* type = */ MACH_MSG_OOL_DESCRIPTOR,
586 };
587#endif /* UseStaticTemplates */
588
589#endif /* __MigKernelSpecificCode */
590 kern_return_t RetCode;
591 vm_map_t target_task;
592
593 __DeclareRcvRpc(4804, "mach_vm_read")
594 __BeforeRcvRpc(4804, "mach_vm_read")
595
596#if defined(__MIG_check__Request__mach_vm_read_t__defined)
597 check_result = __MIG_check__Request__mach_vm_read_t((__Request *)In0P);
598 if (check_result != MACH_MSG_SUCCESS)
599 { MIG_RETURN_ERROR(OutP, check_result); }
600#endif /* defined(__MIG_check__Request__mach_vm_read_t__defined) */
601
602#if UseStaticTemplates
603 OutP->data = dataTemplate;
604#else /* UseStaticTemplates */
605 OutP->data.deallocate = FALSE;
606 OutP->data.copy = MACH_MSG_VIRTUAL_COPY;
607 OutP->data.pad1 = 0;
608 OutP->data.type = MACH_MSG_OOL_DESCRIPTOR;
609#if defined(KERNEL) && !defined(__LP64__)
610 OutP->data.pad_end = 0;
611#endif
612#endif /* UseStaticTemplates */
613
614
615 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
616
617 RetCode = mach_vm_read(target_task, In0P->address, In0P->size, (vm_offset_t *)&(OutP->data.address), &OutP->dataCnt);
618 vm_map_deallocate(target_task);
619 if (RetCode != KERN_SUCCESS) {
620 MIG_RETURN_ERROR(OutP, RetCode);
621 }
622#if __MigKernelSpecificCode
623#endif /* __MigKernelSpecificCode */
624 OutP->data.size = OutP->dataCnt;
625
626
627 OutP->NDR = NDR_record;
628
629
630 OutP->Head.msgh_bits |= MACH_MSGH_BITS_COMPLEX;
631 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply));
632 OutP->msgh_body.msgh_descriptor_count = 1;
633 __AfterRcvRpc(4804, "mach_vm_read")
634}
635
636#if ( __MigTypeCheck )
637#if __MIG_check__Request__mach_vm_subsystem__
638#if !defined(__MIG_check__Request__mach_vm_read_list_t__defined)
639#define __MIG_check__Request__mach_vm_read_list_t__defined
640
641mig_internal kern_return_t __MIG_check__Request__mach_vm_read_list_t(__attribute__((__unused__)) __Request__mach_vm_read_list_t *In0P)
642{
643
644 typedef __Request__mach_vm_read_list_t __Request;
645#if __MigTypeCheck
646 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
647 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
648 return MIG_BAD_ARGUMENTS;
649#endif /* __MigTypeCheck */
650
651 return MACH_MSG_SUCCESS;
652}
653#endif /* !defined(__MIG_check__Request__mach_vm_read_list_t__defined) */
654#endif /* __MIG_check__Request__mach_vm_subsystem__ */
655#endif /* ( __MigTypeCheck ) */
656
657
658/* Routine mach_vm_read_list */
659mig_internal novalue _Xmach_vm_read_list
660 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
661{
662
663#ifdef __MigPackStructs
664#pragma pack(4)
665#endif
666 typedef struct {
667 mach_msg_header_t Head;
668 NDR_record_t NDR;
669 mach_vm_read_entry_t data_list;
670 natural_t count;
671 mach_msg_trailer_t trailer;
672 } Request __attribute__((unused));
673#ifdef __MigPackStructs
674#pragma pack()
675#endif
676 typedef __Request__mach_vm_read_list_t __Request;
677 typedef __Reply__mach_vm_read_list_t Reply __attribute__((unused));
678
679 /*
680 * typedef struct {
681 * mach_msg_header_t Head;
682 * NDR_record_t NDR;
683 * kern_return_t RetCode;
684 * } mig_reply_error_t;
685 */
686
687 Request *In0P = (Request *) InHeadP;
688 Reply *OutP = (Reply *) OutHeadP;
689#ifdef __MIG_check__Request__mach_vm_read_list_t__defined
690 kern_return_t check_result;
691#endif /* __MIG_check__Request__mach_vm_read_list_t__defined */
692
693#if __MigKernelSpecificCode
694#else
695#endif /* __MigKernelSpecificCode */
696 vm_map_t target_task;
697
698 __DeclareRcvRpc(4805, "mach_vm_read_list")
699 __BeforeRcvRpc(4805, "mach_vm_read_list")
700
701#if defined(__MIG_check__Request__mach_vm_read_list_t__defined)
702 check_result = __MIG_check__Request__mach_vm_read_list_t((__Request *)In0P);
703 if (check_result != MACH_MSG_SUCCESS)
704 { MIG_RETURN_ERROR(OutP, check_result); }
705#endif /* defined(__MIG_check__Request__mach_vm_read_list_t__defined) */
706
707 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
708
709 OutP->RetCode = mach_vm_read_list(target_task, In0P->data_list, In0P->count);
710 vm_map_deallocate(target_task);
711 if (OutP->RetCode != KERN_SUCCESS) {
712 MIG_RETURN_ERROR(OutP, OutP->RetCode);
713 }
714#if __MigKernelSpecificCode
715#endif /* __MigKernelSpecificCode */
716
717 OutP->NDR = NDR_record;
718
719
720 { typedef struct { char data[4096]; } *sp;
721 * (sp) OutP->data_list = * (sp) In0P->data_list;
722 }
723
724 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply));
725 __AfterRcvRpc(4805, "mach_vm_read_list")
726}
727
728#if ( __MigTypeCheck )
729#if __MIG_check__Request__mach_vm_subsystem__
730#if !defined(__MIG_check__Request__mach_vm_write_t__defined)
731#define __MIG_check__Request__mach_vm_write_t__defined
732
733mig_internal kern_return_t __MIG_check__Request__mach_vm_write_t(__attribute__((__unused__)) __Request__mach_vm_write_t *In0P)
734{
735
736 typedef __Request__mach_vm_write_t __Request;
737#if __MigTypeCheck
738 if (!(In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
739 (In0P->msgh_body.msgh_descriptor_count != 1) ||
740 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
741 return MIG_BAD_ARGUMENTS;
742#endif /* __MigTypeCheck */
743
744#if __MigTypeCheck
745 if (In0P->data.type != MACH_MSG_OOL_DESCRIPTOR)
746 return MIG_TYPE_ERROR;
747#endif /* __MigTypeCheck */
748
749#if __MigTypeCheck
750 if (In0P->data.size != In0P->dataCnt)
751 return MIG_TYPE_ERROR;
752#endif /* __MigTypeCheck */
753
754 return MACH_MSG_SUCCESS;
755}
756#endif /* !defined(__MIG_check__Request__mach_vm_write_t__defined) */
757#endif /* __MIG_check__Request__mach_vm_subsystem__ */
758#endif /* ( __MigTypeCheck ) */
759
760
761/* Routine mach_vm_write */
762mig_internal novalue _Xmach_vm_write
763 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
764{
765
766#ifdef __MigPackStructs
767#pragma pack(4)
768#endif
769 typedef struct {
770 mach_msg_header_t Head;
771 /* start of the kernel processed data */
772 mach_msg_body_t msgh_body;
773 mach_msg_ool_descriptor_t data;
774 /* end of the kernel processed data */
775 NDR_record_t NDR;
776 mach_vm_address_t address;
777 mach_msg_type_number_t dataCnt;
778 mach_msg_trailer_t trailer;
779 } Request __attribute__((unused));
780#ifdef __MigPackStructs
781#pragma pack()
782#endif
783 typedef __Request__mach_vm_write_t __Request;
784 typedef __Reply__mach_vm_write_t Reply __attribute__((unused));
785
786 /*
787 * typedef struct {
788 * mach_msg_header_t Head;
789 * NDR_record_t NDR;
790 * kern_return_t RetCode;
791 * } mig_reply_error_t;
792 */
793
794 Request *In0P = (Request *) InHeadP;
795 Reply *OutP = (Reply *) OutHeadP;
796#ifdef __MIG_check__Request__mach_vm_write_t__defined
797 kern_return_t check_result;
798#endif /* __MIG_check__Request__mach_vm_write_t__defined */
799
800#if __MigKernelSpecificCode
801#else
802#endif /* __MigKernelSpecificCode */
803 vm_map_t target_task;
804
805 __DeclareRcvRpc(4806, "mach_vm_write")
806 __BeforeRcvRpc(4806, "mach_vm_write")
807
808#if defined(__MIG_check__Request__mach_vm_write_t__defined)
809 check_result = __MIG_check__Request__mach_vm_write_t((__Request *)In0P);
810 if (check_result != MACH_MSG_SUCCESS)
811 { MIG_RETURN_ERROR(OutP, check_result); }
812#endif /* defined(__MIG_check__Request__mach_vm_write_t__defined) */
813
814 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
815
816 OutP->RetCode = mach_vm_write(target_task, In0P->address, (vm_offset_t)(In0P->data.address), In0P->data.size);
817 vm_map_deallocate(target_task);
818#if __MigKernelSpecificCode
819#endif /* __MigKernelSpecificCode */
820
821 OutP->NDR = NDR_record;
822
823
824 __AfterRcvRpc(4806, "mach_vm_write")
825}
826
827#if ( __MigTypeCheck )
828#if __MIG_check__Request__mach_vm_subsystem__
829#if !defined(__MIG_check__Request__mach_vm_copy_t__defined)
830#define __MIG_check__Request__mach_vm_copy_t__defined
831
832mig_internal kern_return_t __MIG_check__Request__mach_vm_copy_t(__attribute__((__unused__)) __Request__mach_vm_copy_t *In0P)
833{
834
835 typedef __Request__mach_vm_copy_t __Request;
836#if __MigTypeCheck
837 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
838 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
839 return MIG_BAD_ARGUMENTS;
840#endif /* __MigTypeCheck */
841
842 return MACH_MSG_SUCCESS;
843}
844#endif /* !defined(__MIG_check__Request__mach_vm_copy_t__defined) */
845#endif /* __MIG_check__Request__mach_vm_subsystem__ */
846#endif /* ( __MigTypeCheck ) */
847
848
849/* Routine mach_vm_copy */
850mig_internal novalue _Xmach_vm_copy
851 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
852{
853
854#ifdef __MigPackStructs
855#pragma pack(4)
856#endif
857 typedef struct {
858 mach_msg_header_t Head;
859 NDR_record_t NDR;
860 mach_vm_address_t source_address;
861 mach_vm_size_t size;
862 mach_vm_address_t dest_address;
863 mach_msg_trailer_t trailer;
864 } Request __attribute__((unused));
865#ifdef __MigPackStructs
866#pragma pack()
867#endif
868 typedef __Request__mach_vm_copy_t __Request;
869 typedef __Reply__mach_vm_copy_t Reply __attribute__((unused));
870
871 /*
872 * typedef struct {
873 * mach_msg_header_t Head;
874 * NDR_record_t NDR;
875 * kern_return_t RetCode;
876 * } mig_reply_error_t;
877 */
878
879 Request *In0P = (Request *) InHeadP;
880 Reply *OutP = (Reply *) OutHeadP;
881#ifdef __MIG_check__Request__mach_vm_copy_t__defined
882 kern_return_t check_result;
883#endif /* __MIG_check__Request__mach_vm_copy_t__defined */
884
885#if __MigKernelSpecificCode
886#else
887#endif /* __MigKernelSpecificCode */
888 vm_map_t target_task;
889
890 __DeclareRcvRpc(4807, "mach_vm_copy")
891 __BeforeRcvRpc(4807, "mach_vm_copy")
892
893#if defined(__MIG_check__Request__mach_vm_copy_t__defined)
894 check_result = __MIG_check__Request__mach_vm_copy_t((__Request *)In0P);
895 if (check_result != MACH_MSG_SUCCESS)
896 { MIG_RETURN_ERROR(OutP, check_result); }
897#endif /* defined(__MIG_check__Request__mach_vm_copy_t__defined) */
898
899 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
900
901 OutP->RetCode = mach_vm_copy(target_task, In0P->source_address, In0P->size, In0P->dest_address);
902 vm_map_deallocate(target_task);
903#if __MigKernelSpecificCode
904#endif /* __MigKernelSpecificCode */
905
906 OutP->NDR = NDR_record;
907
908
909 __AfterRcvRpc(4807, "mach_vm_copy")
910}
911
912#if ( __MigTypeCheck )
913#if __MIG_check__Request__mach_vm_subsystem__
914#if !defined(__MIG_check__Request__mach_vm_read_overwrite_t__defined)
915#define __MIG_check__Request__mach_vm_read_overwrite_t__defined
916
917mig_internal kern_return_t __MIG_check__Request__mach_vm_read_overwrite_t(__attribute__((__unused__)) __Request__mach_vm_read_overwrite_t *In0P)
918{
919
920 typedef __Request__mach_vm_read_overwrite_t __Request;
921#if __MigTypeCheck
922 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
923 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
924 return MIG_BAD_ARGUMENTS;
925#endif /* __MigTypeCheck */
926
927 return MACH_MSG_SUCCESS;
928}
929#endif /* !defined(__MIG_check__Request__mach_vm_read_overwrite_t__defined) */
930#endif /* __MIG_check__Request__mach_vm_subsystem__ */
931#endif /* ( __MigTypeCheck ) */
932
933
934/* Routine mach_vm_read_overwrite */
935mig_internal novalue _Xmach_vm_read_overwrite
936 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
937{
938
939#ifdef __MigPackStructs
940#pragma pack(4)
941#endif
942 typedef struct {
943 mach_msg_header_t Head;
944 NDR_record_t NDR;
945 mach_vm_address_t address;
946 mach_vm_size_t size;
947 mach_vm_address_t data;
948 mach_msg_trailer_t trailer;
949 } Request __attribute__((unused));
950#ifdef __MigPackStructs
951#pragma pack()
952#endif
953 typedef __Request__mach_vm_read_overwrite_t __Request;
954 typedef __Reply__mach_vm_read_overwrite_t Reply __attribute__((unused));
955
956 /*
957 * typedef struct {
958 * mach_msg_header_t Head;
959 * NDR_record_t NDR;
960 * kern_return_t RetCode;
961 * } mig_reply_error_t;
962 */
963
964 Request *In0P = (Request *) InHeadP;
965 Reply *OutP = (Reply *) OutHeadP;
966#ifdef __MIG_check__Request__mach_vm_read_overwrite_t__defined
967 kern_return_t check_result;
968#endif /* __MIG_check__Request__mach_vm_read_overwrite_t__defined */
969
970#if __MigKernelSpecificCode
971#else
972#endif /* __MigKernelSpecificCode */
973 vm_map_t target_task;
974
975 __DeclareRcvRpc(4808, "mach_vm_read_overwrite")
976 __BeforeRcvRpc(4808, "mach_vm_read_overwrite")
977
978#if defined(__MIG_check__Request__mach_vm_read_overwrite_t__defined)
979 check_result = __MIG_check__Request__mach_vm_read_overwrite_t((__Request *)In0P);
980 if (check_result != MACH_MSG_SUCCESS)
981 { MIG_RETURN_ERROR(OutP, check_result); }
982#endif /* defined(__MIG_check__Request__mach_vm_read_overwrite_t__defined) */
983
984 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
985
986 OutP->RetCode = mach_vm_read_overwrite(target_task, In0P->address, In0P->size, In0P->data, &OutP->outsize);
987 vm_map_deallocate(target_task);
988 if (OutP->RetCode != KERN_SUCCESS) {
989 MIG_RETURN_ERROR(OutP, OutP->RetCode);
990 }
991#if __MigKernelSpecificCode
992#endif /* __MigKernelSpecificCode */
993
994 OutP->NDR = NDR_record;
995
996
997 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply));
998 __AfterRcvRpc(4808, "mach_vm_read_overwrite")
999}
1000
1001#if ( __MigTypeCheck )
1002#if __MIG_check__Request__mach_vm_subsystem__
1003#if !defined(__MIG_check__Request__mach_vm_msync_t__defined)
1004#define __MIG_check__Request__mach_vm_msync_t__defined
1005
1006mig_internal kern_return_t __MIG_check__Request__mach_vm_msync_t(__attribute__((__unused__)) __Request__mach_vm_msync_t *In0P)
1007{
1008
1009 typedef __Request__mach_vm_msync_t __Request;
1010#if __MigTypeCheck
1011 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
1012 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
1013 return MIG_BAD_ARGUMENTS;
1014#endif /* __MigTypeCheck */
1015
1016 return MACH_MSG_SUCCESS;
1017}
1018#endif /* !defined(__MIG_check__Request__mach_vm_msync_t__defined) */
1019#endif /* __MIG_check__Request__mach_vm_subsystem__ */
1020#endif /* ( __MigTypeCheck ) */
1021
1022
1023/* Routine mach_vm_msync */
1024mig_internal novalue _Xmach_vm_msync
1025 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
1026{
1027
1028#ifdef __MigPackStructs
1029#pragma pack(4)
1030#endif
1031 typedef struct {
1032 mach_msg_header_t Head;
1033 NDR_record_t NDR;
1034 mach_vm_address_t address;
1035 mach_vm_size_t size;
1036 vm_sync_t sync_flags;
1037 mach_msg_trailer_t trailer;
1038 } Request __attribute__((unused));
1039#ifdef __MigPackStructs
1040#pragma pack()
1041#endif
1042 typedef __Request__mach_vm_msync_t __Request;
1043 typedef __Reply__mach_vm_msync_t Reply __attribute__((unused));
1044
1045 /*
1046 * typedef struct {
1047 * mach_msg_header_t Head;
1048 * NDR_record_t NDR;
1049 * kern_return_t RetCode;
1050 * } mig_reply_error_t;
1051 */
1052
1053 Request *In0P = (Request *) InHeadP;
1054 Reply *OutP = (Reply *) OutHeadP;
1055#ifdef __MIG_check__Request__mach_vm_msync_t__defined
1056 kern_return_t check_result;
1057#endif /* __MIG_check__Request__mach_vm_msync_t__defined */
1058
1059#if __MigKernelSpecificCode
1060#else
1061#endif /* __MigKernelSpecificCode */
1062 vm_map_t target_task;
1063
1064 __DeclareRcvRpc(4809, "mach_vm_msync")
1065 __BeforeRcvRpc(4809, "mach_vm_msync")
1066
1067#if defined(__MIG_check__Request__mach_vm_msync_t__defined)
1068 check_result = __MIG_check__Request__mach_vm_msync_t((__Request *)In0P);
1069 if (check_result != MACH_MSG_SUCCESS)
1070 { MIG_RETURN_ERROR(OutP, check_result); }
1071#endif /* defined(__MIG_check__Request__mach_vm_msync_t__defined) */
1072
1073 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
1074
1075 OutP->RetCode = mach_vm_msync(target_task, In0P->address, In0P->size, In0P->sync_flags);
1076 vm_map_deallocate(target_task);
1077#if __MigKernelSpecificCode
1078#endif /* __MigKernelSpecificCode */
1079
1080 OutP->NDR = NDR_record;
1081
1082
1083 __AfterRcvRpc(4809, "mach_vm_msync")
1084}
1085
1086#if ( __MigTypeCheck )
1087#if __MIG_check__Request__mach_vm_subsystem__
1088#if !defined(__MIG_check__Request__mach_vm_behavior_set_t__defined)
1089#define __MIG_check__Request__mach_vm_behavior_set_t__defined
1090
1091mig_internal kern_return_t __MIG_check__Request__mach_vm_behavior_set_t(__attribute__((__unused__)) __Request__mach_vm_behavior_set_t *In0P)
1092{
1093
1094 typedef __Request__mach_vm_behavior_set_t __Request;
1095#if __MigTypeCheck
1096 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
1097 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
1098 return MIG_BAD_ARGUMENTS;
1099#endif /* __MigTypeCheck */
1100
1101 return MACH_MSG_SUCCESS;
1102}
1103#endif /* !defined(__MIG_check__Request__mach_vm_behavior_set_t__defined) */
1104#endif /* __MIG_check__Request__mach_vm_subsystem__ */
1105#endif /* ( __MigTypeCheck ) */
1106
1107
1108/* Routine mach_vm_behavior_set */
1109mig_internal novalue _Xmach_vm_behavior_set
1110 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
1111{
1112
1113#ifdef __MigPackStructs
1114#pragma pack(4)
1115#endif
1116 typedef struct {
1117 mach_msg_header_t Head;
1118 NDR_record_t NDR;
1119 mach_vm_address_t address;
1120 mach_vm_size_t size;
1121 vm_behavior_t new_behavior;
1122 mach_msg_trailer_t trailer;
1123 } Request __attribute__((unused));
1124#ifdef __MigPackStructs
1125#pragma pack()
1126#endif
1127 typedef __Request__mach_vm_behavior_set_t __Request;
1128 typedef __Reply__mach_vm_behavior_set_t Reply __attribute__((unused));
1129
1130 /*
1131 * typedef struct {
1132 * mach_msg_header_t Head;
1133 * NDR_record_t NDR;
1134 * kern_return_t RetCode;
1135 * } mig_reply_error_t;
1136 */
1137
1138 Request *In0P = (Request *) InHeadP;
1139 Reply *OutP = (Reply *) OutHeadP;
1140#ifdef __MIG_check__Request__mach_vm_behavior_set_t__defined
1141 kern_return_t check_result;
1142#endif /* __MIG_check__Request__mach_vm_behavior_set_t__defined */
1143
1144#if __MigKernelSpecificCode
1145#else
1146#endif /* __MigKernelSpecificCode */
1147 vm_map_t target_task;
1148
1149 __DeclareRcvRpc(4810, "mach_vm_behavior_set")
1150 __BeforeRcvRpc(4810, "mach_vm_behavior_set")
1151
1152#if defined(__MIG_check__Request__mach_vm_behavior_set_t__defined)
1153 check_result = __MIG_check__Request__mach_vm_behavior_set_t((__Request *)In0P);
1154 if (check_result != MACH_MSG_SUCCESS)
1155 { MIG_RETURN_ERROR(OutP, check_result); }
1156#endif /* defined(__MIG_check__Request__mach_vm_behavior_set_t__defined) */
1157
1158 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
1159
1160 OutP->RetCode = mach_vm_behavior_set(target_task, In0P->address, In0P->size, In0P->new_behavior);
1161 vm_map_deallocate(target_task);
1162#if __MigKernelSpecificCode
1163#endif /* __MigKernelSpecificCode */
1164
1165 OutP->NDR = NDR_record;
1166
1167
1168 __AfterRcvRpc(4810, "mach_vm_behavior_set")
1169}
1170
1171#if ( __MigTypeCheck )
1172#if __MIG_check__Request__mach_vm_subsystem__
1173#if !defined(__MIG_check__Request__mach_vm_map_external_t__defined)
1174#define __MIG_check__Request__mach_vm_map_external_t__defined
1175
1176mig_internal kern_return_t __MIG_check__Request__mach_vm_map_external_t(__attribute__((__unused__)) __Request__mach_vm_map_external_t *In0P)
1177{
1178
1179 typedef __Request__mach_vm_map_external_t __Request;
1180#if __MigTypeCheck
1181 if (!(In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
1182 (In0P->msgh_body.msgh_descriptor_count != 1) ||
1183 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
1184 return MIG_BAD_ARGUMENTS;
1185#endif /* __MigTypeCheck */
1186
1187#if __MigTypeCheck
1188 if (In0P->object.type != MACH_MSG_PORT_DESCRIPTOR ||
1189 In0P->object.disposition != 17)
1190 return MIG_TYPE_ERROR;
1191#endif /* __MigTypeCheck */
1192
1193 return MACH_MSG_SUCCESS;
1194}
1195#endif /* !defined(__MIG_check__Request__mach_vm_map_external_t__defined) */
1196#endif /* __MIG_check__Request__mach_vm_subsystem__ */
1197#endif /* ( __MigTypeCheck ) */
1198
1199
1200/* Routine mach_vm_map_external */
1201mig_internal novalue _Xmach_vm_map_external
1202 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
1203{
1204
1205#ifdef __MigPackStructs
1206#pragma pack(4)
1207#endif
1208 typedef struct {
1209 mach_msg_header_t Head;
1210 /* start of the kernel processed data */
1211 mach_msg_body_t msgh_body;
1212 mach_msg_port_descriptor_t object;
1213 /* end of the kernel processed data */
1214 NDR_record_t NDR;
1215 mach_vm_address_t address;
1216 mach_vm_size_t size;
1217 mach_vm_offset_t mask;
1218 int flags;
1219 memory_object_offset_t offset;
1220 boolean_t copy;
1221 vm_prot_t cur_protection;
1222 vm_prot_t max_protection;
1223 vm_inherit_t inheritance;
1224 mach_msg_trailer_t trailer;
1225 } Request __attribute__((unused));
1226#ifdef __MigPackStructs
1227#pragma pack()
1228#endif
1229 typedef __Request__mach_vm_map_external_t __Request;
1230 typedef __Reply__mach_vm_map_external_t Reply __attribute__((unused));
1231
1232 /*
1233 * typedef struct {
1234 * mach_msg_header_t Head;
1235 * NDR_record_t NDR;
1236 * kern_return_t RetCode;
1237 * } mig_reply_error_t;
1238 */
1239
1240 Request *In0P = (Request *) InHeadP;
1241 Reply *OutP = (Reply *) OutHeadP;
1242#ifdef __MIG_check__Request__mach_vm_map_external_t__defined
1243 kern_return_t check_result;
1244#endif /* __MIG_check__Request__mach_vm_map_external_t__defined */
1245
1246#if __MigKernelSpecificCode
1247#else
1248#endif /* __MigKernelSpecificCode */
1249 vm_map_t target_task;
1250
1251 __DeclareRcvRpc(4811, "mach_vm_map_external")
1252 __BeforeRcvRpc(4811, "mach_vm_map_external")
1253
1254#if defined(__MIG_check__Request__mach_vm_map_external_t__defined)
1255 check_result = __MIG_check__Request__mach_vm_map_external_t((__Request *)In0P);
1256 if (check_result != MACH_MSG_SUCCESS)
1257 { MIG_RETURN_ERROR(OutP, check_result); }
1258#endif /* defined(__MIG_check__Request__mach_vm_map_external_t__defined) */
1259
1260 target_task = convert_port_entry_to_map(In0P->Head.msgh_request_port);
1261
1262 OutP->RetCode = mach_vm_map_external(target_task, &In0P->address, In0P->size, In0P->mask, In0P->flags, null_conversion(In0P->object.name), In0P->offset, In0P->copy, In0P->cur_protection, In0P->max_protection, In0P->inheritance);
1263 vm_map_deallocate(target_task);
1264 if (OutP->RetCode != KERN_SUCCESS) {
1265 MIG_RETURN_ERROR(OutP, OutP->RetCode);
1266 }
1267#if __MigKernelSpecificCode
1268
1269 if (IP_VALID((ipc_port_t)In0P->object.name))
1270 ipc_port_release_send((ipc_port_t)In0P->object.name);
1271#endif /* __MigKernelSpecificCode */
1272
1273 OutP->NDR = NDR_record;
1274
1275
1276 OutP->address = In0P->address;
1277
1278 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply));
1279 __AfterRcvRpc(4811, "mach_vm_map_external")
1280}
1281
1282#if ( __MigTypeCheck )
1283#if __MIG_check__Request__mach_vm_subsystem__
1284#if !defined(__MIG_check__Request__mach_vm_machine_attribute_t__defined)
1285#define __MIG_check__Request__mach_vm_machine_attribute_t__defined
1286
1287mig_internal kern_return_t __MIG_check__Request__mach_vm_machine_attribute_t(__attribute__((__unused__)) __Request__mach_vm_machine_attribute_t *In0P)
1288{
1289
1290 typedef __Request__mach_vm_machine_attribute_t __Request;
1291#if __MigTypeCheck
1292 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
1293 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
1294 return MIG_BAD_ARGUMENTS;
1295#endif /* __MigTypeCheck */
1296
1297 return MACH_MSG_SUCCESS;
1298}
1299#endif /* !defined(__MIG_check__Request__mach_vm_machine_attribute_t__defined) */
1300#endif /* __MIG_check__Request__mach_vm_subsystem__ */
1301#endif /* ( __MigTypeCheck ) */
1302
1303
1304/* Routine mach_vm_machine_attribute */
1305mig_internal novalue _Xmach_vm_machine_attribute
1306 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
1307{
1308
1309#ifdef __MigPackStructs
1310#pragma pack(4)
1311#endif
1312 typedef struct {
1313 mach_msg_header_t Head;
1314 NDR_record_t NDR;
1315 mach_vm_address_t address;
1316 mach_vm_size_t size;
1317 vm_machine_attribute_t attribute;
1318 vm_machine_attribute_val_t value;
1319 mach_msg_trailer_t trailer;
1320 } Request __attribute__((unused));
1321#ifdef __MigPackStructs
1322#pragma pack()
1323#endif
1324 typedef __Request__mach_vm_machine_attribute_t __Request;
1325 typedef __Reply__mach_vm_machine_attribute_t Reply __attribute__((unused));
1326
1327 /*
1328 * typedef struct {
1329 * mach_msg_header_t Head;
1330 * NDR_record_t NDR;
1331 * kern_return_t RetCode;
1332 * } mig_reply_error_t;
1333 */
1334
1335 Request *In0P = (Request *) InHeadP;
1336 Reply *OutP = (Reply *) OutHeadP;
1337#ifdef __MIG_check__Request__mach_vm_machine_attribute_t__defined
1338 kern_return_t check_result;
1339#endif /* __MIG_check__Request__mach_vm_machine_attribute_t__defined */
1340
1341#if __MigKernelSpecificCode
1342#else
1343#endif /* __MigKernelSpecificCode */
1344 vm_map_t target_task;
1345
1346 __DeclareRcvRpc(4812, "mach_vm_machine_attribute")
1347 __BeforeRcvRpc(4812, "mach_vm_machine_attribute")
1348
1349#if defined(__MIG_check__Request__mach_vm_machine_attribute_t__defined)
1350 check_result = __MIG_check__Request__mach_vm_machine_attribute_t((__Request *)In0P);
1351 if (check_result != MACH_MSG_SUCCESS)
1352 { MIG_RETURN_ERROR(OutP, check_result); }
1353#endif /* defined(__MIG_check__Request__mach_vm_machine_attribute_t__defined) */
1354
1355 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
1356
1357 OutP->RetCode = mach_vm_machine_attribute(target_task, In0P->address, In0P->size, In0P->attribute, &In0P->value);
1358 vm_map_deallocate(target_task);
1359 if (OutP->RetCode != KERN_SUCCESS) {
1360 MIG_RETURN_ERROR(OutP, OutP->RetCode);
1361 }
1362#if __MigKernelSpecificCode
1363#endif /* __MigKernelSpecificCode */
1364
1365 OutP->NDR = NDR_record;
1366
1367
1368 OutP->value = In0P->value;
1369
1370 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply));
1371 __AfterRcvRpc(4812, "mach_vm_machine_attribute")
1372}
1373
1374#if ( __MigTypeCheck )
1375#if __MIG_check__Request__mach_vm_subsystem__
1376#if !defined(__MIG_check__Request__mach_vm_remap_external_t__defined)
1377#define __MIG_check__Request__mach_vm_remap_external_t__defined
1378
1379mig_internal kern_return_t __MIG_check__Request__mach_vm_remap_external_t(__attribute__((__unused__)) __Request__mach_vm_remap_external_t *In0P)
1380{
1381
1382 typedef __Request__mach_vm_remap_external_t __Request;
1383#if __MigTypeCheck
1384 if (!(In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
1385 (In0P->msgh_body.msgh_descriptor_count != 1) ||
1386 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
1387 return MIG_BAD_ARGUMENTS;
1388#endif /* __MigTypeCheck */
1389
1390#if __MigTypeCheck
1391 if (In0P->src_task.type != MACH_MSG_PORT_DESCRIPTOR ||
1392 In0P->src_task.disposition != 17)
1393 return MIG_TYPE_ERROR;
1394#endif /* __MigTypeCheck */
1395
1396 return MACH_MSG_SUCCESS;
1397}
1398#endif /* !defined(__MIG_check__Request__mach_vm_remap_external_t__defined) */
1399#endif /* __MIG_check__Request__mach_vm_subsystem__ */
1400#endif /* ( __MigTypeCheck ) */
1401
1402
1403/* Routine mach_vm_remap_external */
1404mig_internal novalue _Xmach_vm_remap_external
1405 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
1406{
1407
1408#ifdef __MigPackStructs
1409#pragma pack(4)
1410#endif
1411 typedef struct {
1412 mach_msg_header_t Head;
1413 /* start of the kernel processed data */
1414 mach_msg_body_t msgh_body;
1415 mach_msg_port_descriptor_t src_task;
1416 /* end of the kernel processed data */
1417 NDR_record_t NDR;
1418 mach_vm_address_t target_address;
1419 mach_vm_size_t size;
1420 mach_vm_offset_t mask;
1421 int flags;
1422 mach_vm_address_t src_address;
1423 boolean_t copy;
1424 vm_inherit_t inheritance;
1425 mach_msg_trailer_t trailer;
1426 } Request __attribute__((unused));
1427#ifdef __MigPackStructs
1428#pragma pack()
1429#endif
1430 typedef __Request__mach_vm_remap_external_t __Request;
1431 typedef __Reply__mach_vm_remap_external_t Reply __attribute__((unused));
1432
1433 /*
1434 * typedef struct {
1435 * mach_msg_header_t Head;
1436 * NDR_record_t NDR;
1437 * kern_return_t RetCode;
1438 * } mig_reply_error_t;
1439 */
1440
1441 Request *In0P = (Request *) InHeadP;
1442 Reply *OutP = (Reply *) OutHeadP;
1443#ifdef __MIG_check__Request__mach_vm_remap_external_t__defined
1444 kern_return_t check_result;
1445#endif /* __MIG_check__Request__mach_vm_remap_external_t__defined */
1446
1447#if __MigKernelSpecificCode
1448#else
1449#endif /* __MigKernelSpecificCode */
1450 vm_map_t target_task;
1451 vm_map_t src_task;
1452
1453 __DeclareRcvRpc(4813, "mach_vm_remap_external")
1454 __BeforeRcvRpc(4813, "mach_vm_remap_external")
1455
1456#if defined(__MIG_check__Request__mach_vm_remap_external_t__defined)
1457 check_result = __MIG_check__Request__mach_vm_remap_external_t((__Request *)In0P);
1458 if (check_result != MACH_MSG_SUCCESS)
1459 { MIG_RETURN_ERROR(OutP, check_result); }
1460#endif /* defined(__MIG_check__Request__mach_vm_remap_external_t__defined) */
1461
1462 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
1463
1464 src_task = convert_port_to_map(In0P->src_task.name);
1465
1466 OutP->RetCode = mach_vm_remap_external(target_task, &In0P->target_address, In0P->size, In0P->mask, In0P->flags, src_task, In0P->src_address, In0P->copy, &OutP->cur_protection, &OutP->max_protection, In0P->inheritance);
1467 vm_map_deallocate(src_task);
1468 vm_map_deallocate(target_task);
1469 if (OutP->RetCode != KERN_SUCCESS) {
1470 MIG_RETURN_ERROR(OutP, OutP->RetCode);
1471 }
1472#if __MigKernelSpecificCode
1473
1474 if (IP_VALID((ipc_port_t)In0P->src_task.name))
1475 ipc_port_release_send((ipc_port_t)In0P->src_task.name);
1476#endif /* __MigKernelSpecificCode */
1477
1478 OutP->NDR = NDR_record;
1479
1480
1481 OutP->target_address = In0P->target_address;
1482
1483 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply));
1484 __AfterRcvRpc(4813, "mach_vm_remap_external")
1485}
1486
1487#if ( __MigTypeCheck )
1488#if __MIG_check__Request__mach_vm_subsystem__
1489#if !defined(__MIG_check__Request__mach_vm_page_query_t__defined)
1490#define __MIG_check__Request__mach_vm_page_query_t__defined
1491
1492mig_internal kern_return_t __MIG_check__Request__mach_vm_page_query_t(__attribute__((__unused__)) __Request__mach_vm_page_query_t *In0P)
1493{
1494
1495 typedef __Request__mach_vm_page_query_t __Request;
1496#if __MigTypeCheck
1497 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
1498 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
1499 return MIG_BAD_ARGUMENTS;
1500#endif /* __MigTypeCheck */
1501
1502 return MACH_MSG_SUCCESS;
1503}
1504#endif /* !defined(__MIG_check__Request__mach_vm_page_query_t__defined) */
1505#endif /* __MIG_check__Request__mach_vm_subsystem__ */
1506#endif /* ( __MigTypeCheck ) */
1507
1508
1509/* Routine mach_vm_page_query */
1510mig_internal novalue _Xmach_vm_page_query
1511 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
1512{
1513
1514#ifdef __MigPackStructs
1515#pragma pack(4)
1516#endif
1517 typedef struct {
1518 mach_msg_header_t Head;
1519 NDR_record_t NDR;
1520 mach_vm_offset_t offset;
1521 mach_msg_trailer_t trailer;
1522 } Request __attribute__((unused));
1523#ifdef __MigPackStructs
1524#pragma pack()
1525#endif
1526 typedef __Request__mach_vm_page_query_t __Request;
1527 typedef __Reply__mach_vm_page_query_t Reply __attribute__((unused));
1528
1529 /*
1530 * typedef struct {
1531 * mach_msg_header_t Head;
1532 * NDR_record_t NDR;
1533 * kern_return_t RetCode;
1534 * } mig_reply_error_t;
1535 */
1536
1537 Request *In0P = (Request *) InHeadP;
1538 Reply *OutP = (Reply *) OutHeadP;
1539#ifdef __MIG_check__Request__mach_vm_page_query_t__defined
1540 kern_return_t check_result;
1541#endif /* __MIG_check__Request__mach_vm_page_query_t__defined */
1542
1543#if __MigKernelSpecificCode
1544#else
1545#endif /* __MigKernelSpecificCode */
1546 vm_map_t target_map;
1547
1548 __DeclareRcvRpc(4814, "mach_vm_page_query")
1549 __BeforeRcvRpc(4814, "mach_vm_page_query")
1550
1551#if defined(__MIG_check__Request__mach_vm_page_query_t__defined)
1552 check_result = __MIG_check__Request__mach_vm_page_query_t((__Request *)In0P);
1553 if (check_result != MACH_MSG_SUCCESS)
1554 { MIG_RETURN_ERROR(OutP, check_result); }
1555#endif /* defined(__MIG_check__Request__mach_vm_page_query_t__defined) */
1556
1557 target_map = convert_port_to_map(In0P->Head.msgh_request_port);
1558
1559 OutP->RetCode = mach_vm_page_query(target_map, In0P->offset, &OutP->disposition, &OutP->ref_count);
1560 vm_map_deallocate(target_map);
1561 if (OutP->RetCode != KERN_SUCCESS) {
1562 MIG_RETURN_ERROR(OutP, OutP->RetCode);
1563 }
1564#if __MigKernelSpecificCode
1565#endif /* __MigKernelSpecificCode */
1566
1567 OutP->NDR = NDR_record;
1568
1569
1570 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply));
1571 __AfterRcvRpc(4814, "mach_vm_page_query")
1572}
1573
1574#if ( __MigTypeCheck )
1575#if __MIG_check__Request__mach_vm_subsystem__
1576#if !defined(__MIG_check__Request__mach_vm_region_recurse_t__defined)
1577#define __MIG_check__Request__mach_vm_region_recurse_t__defined
1578
1579mig_internal kern_return_t __MIG_check__Request__mach_vm_region_recurse_t(__attribute__((__unused__)) __Request__mach_vm_region_recurse_t *In0P)
1580{
1581
1582 typedef __Request__mach_vm_region_recurse_t __Request;
1583#if __MigTypeCheck
1584 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
1585 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
1586 return MIG_BAD_ARGUMENTS;
1587#endif /* __MigTypeCheck */
1588
1589 return MACH_MSG_SUCCESS;
1590}
1591#endif /* !defined(__MIG_check__Request__mach_vm_region_recurse_t__defined) */
1592#endif /* __MIG_check__Request__mach_vm_subsystem__ */
1593#endif /* ( __MigTypeCheck ) */
1594
1595
1596/* Routine mach_vm_region_recurse */
1597mig_internal novalue _Xmach_vm_region_recurse
1598 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
1599{
1600
1601#ifdef __MigPackStructs
1602#pragma pack(4)
1603#endif
1604 typedef struct {
1605 mach_msg_header_t Head;
1606 NDR_record_t NDR;
1607 mach_vm_address_t address;
1608 natural_t nesting_depth;
1609 mach_msg_type_number_t infoCnt;
1610 mach_msg_trailer_t trailer;
1611 } Request __attribute__((unused));
1612#ifdef __MigPackStructs
1613#pragma pack()
1614#endif
1615 typedef __Request__mach_vm_region_recurse_t __Request;
1616 typedef __Reply__mach_vm_region_recurse_t Reply __attribute__((unused));
1617
1618 /*
1619 * typedef struct {
1620 * mach_msg_header_t Head;
1621 * NDR_record_t NDR;
1622 * kern_return_t RetCode;
1623 * } mig_reply_error_t;
1624 */
1625
1626 Request *In0P = (Request *) InHeadP;
1627 Reply *OutP = (Reply *) OutHeadP;
1628#ifdef __MIG_check__Request__mach_vm_region_recurse_t__defined
1629 kern_return_t check_result;
1630#endif /* __MIG_check__Request__mach_vm_region_recurse_t__defined */
1631
1632#if __MigKernelSpecificCode
1633#else
1634#endif /* __MigKernelSpecificCode */
1635 vm_map_t target_task;
1636
1637 __DeclareRcvRpc(4815, "mach_vm_region_recurse")
1638 __BeforeRcvRpc(4815, "mach_vm_region_recurse")
1639
1640#if defined(__MIG_check__Request__mach_vm_region_recurse_t__defined)
1641 check_result = __MIG_check__Request__mach_vm_region_recurse_t((__Request *)In0P);
1642 if (check_result != MACH_MSG_SUCCESS)
1643 { MIG_RETURN_ERROR(OutP, check_result); }
1644#endif /* defined(__MIG_check__Request__mach_vm_region_recurse_t__defined) */
1645
1646 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
1647
1648 OutP->infoCnt = 19;
1649 if (In0P->infoCnt < OutP->infoCnt)
1650 OutP->infoCnt = In0P->infoCnt;
1651
1652 OutP->RetCode = mach_vm_region_recurse(target_task, &In0P->address, &OutP->size, &In0P->nesting_depth, OutP->info, &OutP->infoCnt);
1653 vm_map_deallocate(target_task);
1654 if (OutP->RetCode != KERN_SUCCESS) {
1655 MIG_RETURN_ERROR(OutP, OutP->RetCode);
1656 }
1657#if __MigKernelSpecificCode
1658#endif /* __MigKernelSpecificCode */
1659
1660 OutP->NDR = NDR_record;
1661
1662
1663 OutP->address = In0P->address;
1664
1665 OutP->nesting_depth = In0P->nesting_depth;
1666 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply) - 76) + (((4 * OutP->infoCnt)));
1667
1668 __AfterRcvRpc(4815, "mach_vm_region_recurse")
1669}
1670
1671#if ( __MigTypeCheck )
1672#if __MIG_check__Request__mach_vm_subsystem__
1673#if !defined(__MIG_check__Request__mach_vm_region_t__defined)
1674#define __MIG_check__Request__mach_vm_region_t__defined
1675
1676mig_internal kern_return_t __MIG_check__Request__mach_vm_region_t(__attribute__((__unused__)) __Request__mach_vm_region_t *In0P)
1677{
1678
1679 typedef __Request__mach_vm_region_t __Request;
1680#if __MigTypeCheck
1681 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
1682 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
1683 return MIG_BAD_ARGUMENTS;
1684#endif /* __MigTypeCheck */
1685
1686 return MACH_MSG_SUCCESS;
1687}
1688#endif /* !defined(__MIG_check__Request__mach_vm_region_t__defined) */
1689#endif /* __MIG_check__Request__mach_vm_subsystem__ */
1690#endif /* ( __MigTypeCheck ) */
1691
1692
1693/* Routine mach_vm_region */
1694mig_internal novalue _Xmach_vm_region
1695 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
1696{
1697
1698#ifdef __MigPackStructs
1699#pragma pack(4)
1700#endif
1701 typedef struct {
1702 mach_msg_header_t Head;
1703 NDR_record_t NDR;
1704 mach_vm_address_t address;
1705 vm_region_flavor_t flavor;
1706 mach_msg_type_number_t infoCnt;
1707 mach_msg_trailer_t trailer;
1708 } Request __attribute__((unused));
1709#ifdef __MigPackStructs
1710#pragma pack()
1711#endif
1712 typedef __Request__mach_vm_region_t __Request;
1713 typedef __Reply__mach_vm_region_t Reply __attribute__((unused));
1714
1715 /*
1716 * typedef struct {
1717 * mach_msg_header_t Head;
1718 * NDR_record_t NDR;
1719 * kern_return_t RetCode;
1720 * } mig_reply_error_t;
1721 */
1722
1723 Request *In0P = (Request *) InHeadP;
1724 Reply *OutP = (Reply *) OutHeadP;
1725#ifdef __MIG_check__Request__mach_vm_region_t__defined
1726 kern_return_t check_result;
1727#endif /* __MIG_check__Request__mach_vm_region_t__defined */
1728
1729#if __MigKernelSpecificCode
1730#if UseStaticTemplates
1731 const static mach_msg_port_descriptor_t object_nameTemplate = {
1732 /* name = */ MACH_PORT_NULL,
1733 /* pad1 = */ 0,
1734 /* pad2 = */ 0,
1735 /* disp = */ 17,
1736 /* type = */ MACH_MSG_PORT_DESCRIPTOR,
1737 };
1738#endif /* UseStaticTemplates */
1739
1740#else
1741#if UseStaticTemplates
1742 const static mach_msg_port_descriptor_t object_nameTemplate = {
1743 /* name = */ MACH_PORT_NULL,
1744 /* pad1 = */ 0,
1745 /* pad2 = */ 0,
1746 /* disp = */ 17,
1747 /* type = */ MACH_MSG_PORT_DESCRIPTOR,
1748 };
1749#endif /* UseStaticTemplates */
1750
1751#endif /* __MigKernelSpecificCode */
1752 kern_return_t RetCode;
1753 vm_map_t target_task;
1754
1755 __DeclareRcvRpc(4816, "mach_vm_region")
1756 __BeforeRcvRpc(4816, "mach_vm_region")
1757
1758#if defined(__MIG_check__Request__mach_vm_region_t__defined)
1759 check_result = __MIG_check__Request__mach_vm_region_t((__Request *)In0P);
1760 if (check_result != MACH_MSG_SUCCESS)
1761 { MIG_RETURN_ERROR(OutP, check_result); }
1762#endif /* defined(__MIG_check__Request__mach_vm_region_t__defined) */
1763
1764#if UseStaticTemplates
1765 OutP->object_name = object_nameTemplate;
1766#else /* UseStaticTemplates */
1767#if __MigKernelSpecificCode
1768 OutP->object_name.disposition = 17;
1769#else
1770 OutP->object_name.disposition = 17;
1771#endif /* __MigKernelSpecificCode */
1772#if !(defined(KERNEL) && defined(__LP64__))
1773 OutP->object_name.pad1 = 0;
1774#endif
1775 OutP->object_name.pad2 = 0;
1776 OutP->object_name.type = MACH_MSG_PORT_DESCRIPTOR;
1777#if defined(KERNEL)
1778 OutP->object_name.pad_end = 0;
1779#endif
1780#endif /* UseStaticTemplates */
1781
1782
1783 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
1784
1785 OutP->infoCnt = 10;
1786 if (In0P->infoCnt < OutP->infoCnt)
1787 OutP->infoCnt = In0P->infoCnt;
1788
1789 RetCode = mach_vm_region(target_task, &In0P->address, &OutP->size, In0P->flavor, OutP->info, &OutP->infoCnt, &OutP->object_name.name);
1790 vm_map_deallocate(target_task);
1791 if (RetCode != KERN_SUCCESS) {
1792 MIG_RETURN_ERROR(OutP, RetCode);
1793 }
1794#if __MigKernelSpecificCode
1795#endif /* __MigKernelSpecificCode */
1796
1797 OutP->NDR = NDR_record;
1798
1799
1800 OutP->address = In0P->address;
1801 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply) - 40) + (((4 * OutP->infoCnt)));
1802
1803 OutP->Head.msgh_bits |= MACH_MSGH_BITS_COMPLEX;
1804 OutP->msgh_body.msgh_descriptor_count = 1;
1805 __AfterRcvRpc(4816, "mach_vm_region")
1806}
1807
1808#if ( __MigTypeCheck )
1809#if __MIG_check__Request__mach_vm_subsystem__
1810#if !defined(__MIG_check__Request___mach_make_memory_entry_t__defined)
1811#define __MIG_check__Request___mach_make_memory_entry_t__defined
1812
1813mig_internal kern_return_t __MIG_check__Request___mach_make_memory_entry_t(__attribute__((__unused__)) __Request___mach_make_memory_entry_t *In0P)
1814{
1815
1816 typedef __Request___mach_make_memory_entry_t __Request;
1817#if __MigTypeCheck
1818 if (!(In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
1819 (In0P->msgh_body.msgh_descriptor_count != 1) ||
1820 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
1821 return MIG_BAD_ARGUMENTS;
1822#endif /* __MigTypeCheck */
1823
1824#if __MigTypeCheck
1825 if (In0P->parent_handle.type != MACH_MSG_PORT_DESCRIPTOR ||
1826 In0P->parent_handle.disposition != 17)
1827 return MIG_TYPE_ERROR;
1828#endif /* __MigTypeCheck */
1829
1830 return MACH_MSG_SUCCESS;
1831}
1832#endif /* !defined(__MIG_check__Request___mach_make_memory_entry_t__defined) */
1833#endif /* __MIG_check__Request__mach_vm_subsystem__ */
1834#endif /* ( __MigTypeCheck ) */
1835
1836
1837/* Routine _mach_make_memory_entry */
1838mig_internal novalue _X_mach_make_memory_entry
1839 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
1840{
1841
1842#ifdef __MigPackStructs
1843#pragma pack(4)
1844#endif
1845 typedef struct {
1846 mach_msg_header_t Head;
1847 /* start of the kernel processed data */
1848 mach_msg_body_t msgh_body;
1849 mach_msg_port_descriptor_t parent_handle;
1850 /* end of the kernel processed data */
1851 NDR_record_t NDR;
1852 memory_object_size_t size;
1853 memory_object_offset_t offset;
1854 vm_prot_t permission;
1855 mach_msg_trailer_t trailer;
1856 } Request __attribute__((unused));
1857#ifdef __MigPackStructs
1858#pragma pack()
1859#endif
1860 typedef __Request___mach_make_memory_entry_t __Request;
1861 typedef __Reply___mach_make_memory_entry_t Reply __attribute__((unused));
1862
1863 /*
1864 * typedef struct {
1865 * mach_msg_header_t Head;
1866 * NDR_record_t NDR;
1867 * kern_return_t RetCode;
1868 * } mig_reply_error_t;
1869 */
1870
1871 Request *In0P = (Request *) InHeadP;
1872 Reply *OutP = (Reply *) OutHeadP;
1873#ifdef __MIG_check__Request___mach_make_memory_entry_t__defined
1874 kern_return_t check_result;
1875#endif /* __MIG_check__Request___mach_make_memory_entry_t__defined */
1876
1877#if __MigKernelSpecificCode
1878#if UseStaticTemplates
1879 const static mach_msg_port_descriptor_t object_handleTemplate = {
1880 /* name = */ MACH_PORT_NULL,
1881 /* pad1 = */ 0,
1882 /* pad2 = */ 0,
1883 /* disp = */ 17,
1884 /* type = */ MACH_MSG_PORT_DESCRIPTOR,
1885 };
1886#endif /* UseStaticTemplates */
1887
1888#else
1889#if UseStaticTemplates
1890 const static mach_msg_port_descriptor_t object_handleTemplate = {
1891 /* name = */ MACH_PORT_NULL,
1892 /* pad1 = */ 0,
1893 /* pad2 = */ 0,
1894 /* disp = */ 17,
1895 /* type = */ MACH_MSG_PORT_DESCRIPTOR,
1896 };
1897#endif /* UseStaticTemplates */
1898
1899#endif /* __MigKernelSpecificCode */
1900 kern_return_t RetCode;
1901 vm_map_t target_task;
1902 mem_entry_name_port_t object_handle;
1903
1904 __DeclareRcvRpc(4817, "_mach_make_memory_entry")
1905 __BeforeRcvRpc(4817, "_mach_make_memory_entry")
1906
1907#if defined(__MIG_check__Request___mach_make_memory_entry_t__defined)
1908 check_result = __MIG_check__Request___mach_make_memory_entry_t((__Request *)In0P);
1909 if (check_result != MACH_MSG_SUCCESS)
1910 { MIG_RETURN_ERROR(OutP, check_result); }
1911#endif /* defined(__MIG_check__Request___mach_make_memory_entry_t__defined) */
1912
1913#if UseStaticTemplates
1914 OutP->object_handle = object_handleTemplate;
1915#else /* UseStaticTemplates */
1916#if __MigKernelSpecificCode
1917 OutP->object_handle.disposition = 17;
1918#else
1919 OutP->object_handle.disposition = 17;
1920#endif /* __MigKernelSpecificCode */
1921#if !(defined(KERNEL) && defined(__LP64__))
1922 OutP->object_handle.pad1 = 0;
1923#endif
1924 OutP->object_handle.pad2 = 0;
1925 OutP->object_handle.type = MACH_MSG_PORT_DESCRIPTOR;
1926#if defined(KERNEL)
1927 OutP->object_handle.pad_end = 0;
1928#endif
1929#endif /* UseStaticTemplates */
1930
1931
1932 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
1933
1934 RetCode = _mach_make_memory_entry(target_task, &In0P->size, In0P->offset, In0P->permission, &object_handle, null_conversion(In0P->parent_handle.name));
1935 vm_map_deallocate(target_task);
1936 if (RetCode != KERN_SUCCESS) {
1937 MIG_RETURN_ERROR(OutP, RetCode);
1938 }
1939#if __MigKernelSpecificCode
1940
1941 if (IP_VALID((ipc_port_t)In0P->parent_handle.name))
1942 ipc_port_release_send((ipc_port_t)In0P->parent_handle.name);
1943#endif /* __MigKernelSpecificCode */
1944 OutP->object_handle.name = (mach_port_t)null_conversion(object_handle);
1945
1946
1947 OutP->NDR = NDR_record;
1948
1949
1950 OutP->size = In0P->size;
1951
1952 OutP->Head.msgh_bits |= MACH_MSGH_BITS_COMPLEX;
1953 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply));
1954 OutP->msgh_body.msgh_descriptor_count = 1;
1955 __AfterRcvRpc(4817, "_mach_make_memory_entry")
1956}
1957
1958#if ( __MigTypeCheck )
1959#if __MIG_check__Request__mach_vm_subsystem__
1960#if !defined(__MIG_check__Request__mach_vm_purgable_control_t__defined)
1961#define __MIG_check__Request__mach_vm_purgable_control_t__defined
1962
1963mig_internal kern_return_t __MIG_check__Request__mach_vm_purgable_control_t(__attribute__((__unused__)) __Request__mach_vm_purgable_control_t *In0P)
1964{
1965
1966 typedef __Request__mach_vm_purgable_control_t __Request;
1967#if __MigTypeCheck
1968 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
1969 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
1970 return MIG_BAD_ARGUMENTS;
1971#endif /* __MigTypeCheck */
1972
1973 return MACH_MSG_SUCCESS;
1974}
1975#endif /* !defined(__MIG_check__Request__mach_vm_purgable_control_t__defined) */
1976#endif /* __MIG_check__Request__mach_vm_subsystem__ */
1977#endif /* ( __MigTypeCheck ) */
1978
1979
1980/* Routine mach_vm_purgable_control */
1981mig_internal novalue _Xmach_vm_purgable_control
1982 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
1983{
1984
1985#ifdef __MigPackStructs
1986#pragma pack(4)
1987#endif
1988 typedef struct {
1989 mach_msg_header_t Head;
1990 NDR_record_t NDR;
1991 mach_vm_address_t address;
1992 vm_purgable_t control;
1993 int state;
1994 mach_msg_trailer_t trailer;
1995 } Request __attribute__((unused));
1996#ifdef __MigPackStructs
1997#pragma pack()
1998#endif
1999 typedef __Request__mach_vm_purgable_control_t __Request;
2000 typedef __Reply__mach_vm_purgable_control_t Reply __attribute__((unused));
2001
2002 /*
2003 * typedef struct {
2004 * mach_msg_header_t Head;
2005 * NDR_record_t NDR;
2006 * kern_return_t RetCode;
2007 * } mig_reply_error_t;
2008 */
2009
2010 Request *In0P = (Request *) InHeadP;
2011 Reply *OutP = (Reply *) OutHeadP;
2012#ifdef __MIG_check__Request__mach_vm_purgable_control_t__defined
2013 kern_return_t check_result;
2014#endif /* __MIG_check__Request__mach_vm_purgable_control_t__defined */
2015
2016#if __MigKernelSpecificCode
2017#else
2018#endif /* __MigKernelSpecificCode */
2019 vm_map_t target_task;
2020
2021 __DeclareRcvRpc(4818, "mach_vm_purgable_control")
2022 __BeforeRcvRpc(4818, "mach_vm_purgable_control")
2023
2024#if defined(__MIG_check__Request__mach_vm_purgable_control_t__defined)
2025 check_result = __MIG_check__Request__mach_vm_purgable_control_t((__Request *)In0P);
2026 if (check_result != MACH_MSG_SUCCESS)
2027 { MIG_RETURN_ERROR(OutP, check_result); }
2028#endif /* defined(__MIG_check__Request__mach_vm_purgable_control_t__defined) */
2029
2030 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
2031
2032 OutP->RetCode = mach_vm_purgable_control(target_task, In0P->address, In0P->control, &In0P->state);
2033 vm_map_deallocate(target_task);
2034 if (OutP->RetCode != KERN_SUCCESS) {
2035 MIG_RETURN_ERROR(OutP, OutP->RetCode);
2036 }
2037#if __MigKernelSpecificCode
2038#endif /* __MigKernelSpecificCode */
2039
2040 OutP->NDR = NDR_record;
2041
2042
2043 OutP->state = In0P->state;
2044
2045 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply));
2046 __AfterRcvRpc(4818, "mach_vm_purgable_control")
2047}
2048
2049#if ( __MigTypeCheck )
2050#if __MIG_check__Request__mach_vm_subsystem__
2051#if !defined(__MIG_check__Request__mach_vm_page_info_t__defined)
2052#define __MIG_check__Request__mach_vm_page_info_t__defined
2053
2054mig_internal kern_return_t __MIG_check__Request__mach_vm_page_info_t(__attribute__((__unused__)) __Request__mach_vm_page_info_t *In0P)
2055{
2056
2057 typedef __Request__mach_vm_page_info_t __Request;
2058#if __MigTypeCheck
2059 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
2060 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
2061 return MIG_BAD_ARGUMENTS;
2062#endif /* __MigTypeCheck */
2063
2064 return MACH_MSG_SUCCESS;
2065}
2066#endif /* !defined(__MIG_check__Request__mach_vm_page_info_t__defined) */
2067#endif /* __MIG_check__Request__mach_vm_subsystem__ */
2068#endif /* ( __MigTypeCheck ) */
2069
2070
2071/* Routine mach_vm_page_info */
2072mig_internal novalue _Xmach_vm_page_info
2073 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
2074{
2075
2076#ifdef __MigPackStructs
2077#pragma pack(4)
2078#endif
2079 typedef struct {
2080 mach_msg_header_t Head;
2081 NDR_record_t NDR;
2082 mach_vm_address_t address;
2083 vm_page_info_flavor_t flavor;
2084 mach_msg_type_number_t infoCnt;
2085 mach_msg_trailer_t trailer;
2086 } Request __attribute__((unused));
2087#ifdef __MigPackStructs
2088#pragma pack()
2089#endif
2090 typedef __Request__mach_vm_page_info_t __Request;
2091 typedef __Reply__mach_vm_page_info_t Reply __attribute__((unused));
2092
2093 /*
2094 * typedef struct {
2095 * mach_msg_header_t Head;
2096 * NDR_record_t NDR;
2097 * kern_return_t RetCode;
2098 * } mig_reply_error_t;
2099 */
2100
2101 Request *In0P = (Request *) InHeadP;
2102 Reply *OutP = (Reply *) OutHeadP;
2103#ifdef __MIG_check__Request__mach_vm_page_info_t__defined
2104 kern_return_t check_result;
2105#endif /* __MIG_check__Request__mach_vm_page_info_t__defined */
2106
2107#if __MigKernelSpecificCode
2108#else
2109#endif /* __MigKernelSpecificCode */
2110 vm_map_t target_task;
2111
2112 __DeclareRcvRpc(4819, "mach_vm_page_info")
2113 __BeforeRcvRpc(4819, "mach_vm_page_info")
2114
2115#if defined(__MIG_check__Request__mach_vm_page_info_t__defined)
2116 check_result = __MIG_check__Request__mach_vm_page_info_t((__Request *)In0P);
2117 if (check_result != MACH_MSG_SUCCESS)
2118 { MIG_RETURN_ERROR(OutP, check_result); }
2119#endif /* defined(__MIG_check__Request__mach_vm_page_info_t__defined) */
2120
2121 target_task = convert_port_to_map(In0P->Head.msgh_request_port);
2122
2123 OutP->infoCnt = 32;
2124 if (In0P->infoCnt < OutP->infoCnt)
2125 OutP->infoCnt = In0P->infoCnt;
2126
2127 OutP->RetCode = mach_vm_page_info(target_task, In0P->address, In0P->flavor, OutP->info, &OutP->infoCnt);
2128 vm_map_deallocate(target_task);
2129 if (OutP->RetCode != KERN_SUCCESS) {
2130 MIG_RETURN_ERROR(OutP, OutP->RetCode);
2131 }
2132#if __MigKernelSpecificCode
2133#endif /* __MigKernelSpecificCode */
2134
2135 OutP->NDR = NDR_record;
2136
2137 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply) - 128) + (((4 * OutP->infoCnt)));
2138
2139 __AfterRcvRpc(4819, "mach_vm_page_info")
2140}
2141
2142#if ( __MigTypeCheck )
2143#if __MIG_check__Request__mach_vm_subsystem__
2144#if !defined(__MIG_check__Request__mach_vm_page_range_query_t__defined)
2145#define __MIG_check__Request__mach_vm_page_range_query_t__defined
2146
2147mig_internal kern_return_t __MIG_check__Request__mach_vm_page_range_query_t(__attribute__((__unused__)) __Request__mach_vm_page_range_query_t *In0P)
2148{
2149
2150 typedef __Request__mach_vm_page_range_query_t __Request;
2151#if __MigTypeCheck
2152 if ((In0P->Head.msgh_bits & MACH_MSGH_BITS_COMPLEX) ||
2153 (In0P->Head.msgh_size != (mach_msg_size_t)sizeof(__Request)))
2154 return MIG_BAD_ARGUMENTS;
2155#endif /* __MigTypeCheck */
2156
2157 return MACH_MSG_SUCCESS;
2158}
2159#endif /* !defined(__MIG_check__Request__mach_vm_page_range_query_t__defined) */
2160#endif /* __MIG_check__Request__mach_vm_subsystem__ */
2161#endif /* ( __MigTypeCheck ) */
2162
2163
2164/* Routine mach_vm_page_range_query */
2165mig_internal novalue _Xmach_vm_page_range_query
2166 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
2167{
2168
2169#ifdef __MigPackStructs
2170#pragma pack(4)
2171#endif
2172 typedef struct {
2173 mach_msg_header_t Head;
2174 NDR_record_t NDR;
2175 mach_vm_offset_t address;
2176 mach_vm_size_t size;
2177 mach_vm_address_t dispositions;
2178 mach_vm_size_t dispositions_count;
2179 mach_msg_trailer_t trailer;
2180 } Request __attribute__((unused));
2181#ifdef __MigPackStructs
2182#pragma pack()
2183#endif
2184 typedef __Request__mach_vm_page_range_query_t __Request;
2185 typedef __Reply__mach_vm_page_range_query_t Reply __attribute__((unused));
2186
2187 /*
2188 * typedef struct {
2189 * mach_msg_header_t Head;
2190 * NDR_record_t NDR;
2191 * kern_return_t RetCode;
2192 * } mig_reply_error_t;
2193 */
2194
2195 Request *In0P = (Request *) InHeadP;
2196 Reply *OutP = (Reply *) OutHeadP;
2197#ifdef __MIG_check__Request__mach_vm_page_range_query_t__defined
2198 kern_return_t check_result;
2199#endif /* __MIG_check__Request__mach_vm_page_range_query_t__defined */
2200
2201#if __MigKernelSpecificCode
2202#else
2203#endif /* __MigKernelSpecificCode */
2204 vm_map_t target_map;
2205
2206 __DeclareRcvRpc(4820, "mach_vm_page_range_query")
2207 __BeforeRcvRpc(4820, "mach_vm_page_range_query")
2208
2209#if defined(__MIG_check__Request__mach_vm_page_range_query_t__defined)
2210 check_result = __MIG_check__Request__mach_vm_page_range_query_t((__Request *)In0P);
2211 if (check_result != MACH_MSG_SUCCESS)
2212 { MIG_RETURN_ERROR(OutP, check_result); }
2213#endif /* defined(__MIG_check__Request__mach_vm_page_range_query_t__defined) */
2214
2215 target_map = convert_port_to_map(In0P->Head.msgh_request_port);
2216
2217 OutP->RetCode = mach_vm_page_range_query(target_map, In0P->address, In0P->size, In0P->dispositions, &In0P->dispositions_count);
2218 vm_map_deallocate(target_map);
2219 if (OutP->RetCode != KERN_SUCCESS) {
2220 MIG_RETURN_ERROR(OutP, OutP->RetCode);
2221 }
2222#if __MigKernelSpecificCode
2223#endif /* __MigKernelSpecificCode */
2224
2225 OutP->NDR = NDR_record;
2226
2227
2228 OutP->dispositions_count = In0P->dispositions_count;
2229
2230 OutP->Head.msgh_size = (mach_msg_size_t)(sizeof(Reply));
2231 __AfterRcvRpc(4820, "mach_vm_page_range_query")
2232}
2233
2234
2235
2236/* Description of this subsystem, for use in direct RPC */
2237const struct mach_vm_subsystem mach_vm_subsystem = {
2238 mach_vm_server_routine,
2239 4800,
2240 4821,
2241 (mach_msg_size_t)sizeof(union __ReplyUnion__mach_vm_subsystem),
2242 (vm_address_t)0,
2243 {
2244 { (mig_impl_routine_t) 0,
2245 (mig_stub_routine_t) _Xmach_vm_allocate_external, 5, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_allocate_external_t)},
2246 { (mig_impl_routine_t) 0,
2247 (mig_stub_routine_t) _Xmach_vm_deallocate, 5, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_deallocate_t)},
2248 { (mig_impl_routine_t) 0,
2249 (mig_stub_routine_t) _Xmach_vm_protect, 7, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_protect_t)},
2250 { (mig_impl_routine_t) 0,
2251 (mig_stub_routine_t) _Xmach_vm_inherit, 6, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_inherit_t)},
2252 { (mig_impl_routine_t) 0,
2253 (mig_stub_routine_t) _Xmach_vm_read, 7, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_read_t)},
2254 { (mig_impl_routine_t) 0,
2255 (mig_stub_routine_t) _Xmach_vm_read_list, 3, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_read_list_t)},
2256 { (mig_impl_routine_t) 0,
2257 (mig_stub_routine_t) _Xmach_vm_write, 5, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_write_t)},
2258 { (mig_impl_routine_t) 0,
2259 (mig_stub_routine_t) _Xmach_vm_copy, 7, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_copy_t)},
2260 { (mig_impl_routine_t) 0,
2261 (mig_stub_routine_t) _Xmach_vm_read_overwrite, 8, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_read_overwrite_t)},
2262 { (mig_impl_routine_t) 0,
2263 (mig_stub_routine_t) _Xmach_vm_msync, 6, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_msync_t)},
2264 { (mig_impl_routine_t) 0,
2265 (mig_stub_routine_t) _Xmach_vm_behavior_set, 6, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_behavior_set_t)},
2266 { (mig_impl_routine_t) 0,
2267 (mig_stub_routine_t) _Xmach_vm_map_external, 14, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_map_external_t)},
2268 { (mig_impl_routine_t) 0,
2269 (mig_stub_routine_t) _Xmach_vm_machine_attribute, 7, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_machine_attribute_t)},
2270 { (mig_impl_routine_t) 0,
2271 (mig_stub_routine_t) _Xmach_vm_remap_external, 14, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_remap_external_t)},
2272 { (mig_impl_routine_t) 0,
2273 (mig_stub_routine_t) _Xmach_vm_page_query, 5, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_page_query_t)},
2274 { (mig_impl_routine_t) 0,
2275 (mig_stub_routine_t) _Xmach_vm_region_recurse, 6, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_region_recurse_t)},
2276 { (mig_impl_routine_t) 0,
2277 (mig_stub_routine_t) _Xmach_vm_region, 7, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_region_t)},
2278 { (mig_impl_routine_t) 0,
2279 (mig_stub_routine_t) _X_mach_make_memory_entry, 7, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply___mach_make_memory_entry_t)},
2280 { (mig_impl_routine_t) 0,
2281 (mig_stub_routine_t) _Xmach_vm_purgable_control, 5, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_purgable_control_t)},
2282 { (mig_impl_routine_t) 0,
2283 (mig_stub_routine_t) _Xmach_vm_page_info, 6, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_page_info_t)},
2284 { (mig_impl_routine_t) 0,
2285 (mig_stub_routine_t) _Xmach_vm_page_range_query, 8, 0, (routine_arg_descriptor_t)0, (mach_msg_size_t)sizeof(__Reply__mach_vm_page_range_query_t)},
2286 }
2287};
2288
2289mig_external boolean_t mach_vm_server
2290 (mach_msg_header_t *InHeadP, mach_msg_header_t *OutHeadP)
2291{
2292 /*
2293 * typedef struct {
2294 * mach_msg_header_t Head;
2295 * NDR_record_t NDR;
2296 * kern_return_t RetCode;
2297 * } mig_reply_error_t;
2298 */
2299
2300 register mig_routine_t routine;
2301
2302 OutHeadP->msgh_bits = MACH_MSGH_BITS(MACH_MSGH_BITS_REPLY(InHeadP->msgh_bits), 0);
2303 OutHeadP->msgh_remote_port = InHeadP->msgh_reply_port;
2304 /* Minimal size: routine() will update it if different */
2305 OutHeadP->msgh_size = (mach_msg_size_t)sizeof(mig_reply_error_t);
2306 OutHeadP->msgh_local_port = MACH_PORT_NULL;
2307 OutHeadP->msgh_id = InHeadP->msgh_id + 100;
2308 OutHeadP->msgh_reserved = 0;
2309
2310 if ((InHeadP->msgh_id > 4820) || (InHeadP->msgh_id < 4800) ||
2311 ((routine = mach_vm_subsystem.routine[InHeadP->msgh_id - 4800].stub_routine) == 0)) {
2312 ((mig_reply_error_t *)OutHeadP)->NDR = NDR_record;
2313 ((mig_reply_error_t *)OutHeadP)->RetCode = MIG_BAD_ID;
2314 return FALSE;
2315 }
2316 (*routine) (InHeadP, OutHeadP);
2317 return TRUE;
2318}
2319
2320mig_external mig_routine_t mach_vm_server_routine
2321 (mach_msg_header_t *InHeadP)
2322{
2323 register int msgh_id;
2324
2325 msgh_id = InHeadP->msgh_id - 4800;
2326
2327 if ((msgh_id > 20) || (msgh_id < 0))
2328 return 0;
2329
2330 return mach_vm_subsystem.routine[msgh_id].stub_routine;
2331}
2332